[PATCH] D127115: [RFC][DAGCombine] Make sure combined nodes are added back to the worklist in topological order.
Simon Pilgrim via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Thu Jun 9 05:47:15 PDT 2022
RKSimon added inline comments.
================
Comment at: llvm/test/CodeGen/PowerPC/vec_shuffle.ll:54
+; CHECK-NEXT: addi 1, 1, 96
; CHECK-NEXT: blr
entry:
----------------
DAGCombiner::combineInsertEltToShuffle needs to be extended to realise it can it replace UNDEF shuffle operands with the extract_vector_elt vector source.
```
SelectionDAG has 33 nodes:
t0: ch = EntryToken
t2: i32,ch = CopyFromReg t0, Register:i32 %0
t4: i32,ch = CopyFromReg t0, Register:i32 %1
t79: v16i8,ch = load<(load (s128) from %ir.B)> t0, t4, undef:i32
t80: v16i8,ch = load<(load (s128) from %ir.A)> t0, t2, undef:i32
t60: ch = TokenFactor t80:1, t79:1
t77: v16i8 = vector_shuffle<5,6,7,8,9,10,11,12,13,14,15,u,u,u,u,u> t80, undef:v16i8
t33: i8 = extract_vector_elt t79, Constant:i32<0>
t54: v16i8 = insert_vector_elt t77, t33, Constant:i32<11>
t35: i8 = extract_vector_elt t79, Constant:i32<1>
t55: v16i8 = insert_vector_elt t54, t35, Constant:i32<12>
t37: i8 = extract_vector_elt t79, Constant:i32<2>
t56: v16i8 = insert_vector_elt t55, t37, Constant:i32<13>
t39: i8 = extract_vector_elt t79, Constant:i32<3>
t57: v16i8 = insert_vector_elt t56, t39, Constant:i32<14>
t41: i8 = extract_vector_elt t79, Constant:i32<4>
t58: v16i8 = insert_vector_elt t57, t41, Constant:i32<15>
t63: ch = store<(store (s128) into %ir.A)> t60, t58, t2, undef:i32
t62: ch = PPCISD::RET_FLAG t63
```
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D127115/new/
https://reviews.llvm.org/D127115
More information about the llvm-commits
mailing list