[PATCH] D127398: [InstCombine] add vector support for (A >> C) == (B >> C) --> (A^B) u< (1 << C)
Chenbing.Zheng via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Thu Jun 9 04:52:43 PDT 2022
Chenbing.Zheng created this revision.
Chenbing.Zheng added reviewers: spatel, RKSimon, benshi001.
Chenbing.Zheng added a project: LLVM.
Herald added a subscriber: hiraditya.
Herald added a project: All.
Chenbing.Zheng requested review of this revision.
Herald added subscribers: llvm-commits, jacquesguan.
Repository:
rG LLVM Github Monorepo
https://reviews.llvm.org/D127398
Files:
llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp
llvm/test/Transforms/InstCombine/compare-signs.ll
Index: llvm/test/Transforms/InstCombine/compare-signs.ll
===================================================================
--- llvm/test/Transforms/InstCombine/compare-signs.ll
+++ llvm/test/Transforms/InstCombine/compare-signs.ll
@@ -47,17 +47,32 @@
ret i32 %t3
}
-; TODO this should optimize but doesn't due to missing vector support in InstCombiner::foldICmpEquality.
define <2 x i32> @test3vec(<2 x i32> %a, <2 x i32> %b) nounwind readnone {
; CHECK-LABEL: @test3vec(
+; CHECK-NEXT: [[T2_UNSHIFTED:%.*]] = xor <2 x i32> [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[T2:%.*]] = icmp sgt <2 x i32> [[T2_UNSHIFTED]], <i32 -1, i32 -1>
+; CHECK-NEXT: [[T3:%.*]] = zext <2 x i1> [[T2]] to <2 x i32>
+; CHECK-NEXT: ret <2 x i32> [[T3]]
+;
+ %t0 = lshr <2 x i32> %a, <i32 31, i32 31>
+ %t1 = lshr <2 x i32> %b, <i32 31, i32 31>
+ %t2 = icmp eq <2 x i32> %t0, %t1
+ %t3 = zext <2 x i1> %t2 to <2 x i32>
+ ret <2 x i32> %t3
+}
+
+; negative test
+
+define <2 x i32> @test4vec(<2 x i32> %a, <2 x i32> %b) nounwind readnone {
+; CHECK-LABEL: @test4vec(
; CHECK-NEXT: [[T0:%.*]] = lshr <2 x i32> [[A:%.*]], <i32 31, i32 31>
-; CHECK-NEXT: [[T1:%.*]] = lshr <2 x i32> [[B:%.*]], <i32 31, i32 31>
+; CHECK-NEXT: [[T1:%.*]] = lshr <2 x i32> [[B:%.*]], <i32 30, i32 30>
; CHECK-NEXT: [[T2:%.*]] = icmp eq <2 x i32> [[T0]], [[T1]]
; CHECK-NEXT: [[T3:%.*]] = zext <2 x i1> [[T2]] to <2 x i32>
; CHECK-NEXT: ret <2 x i32> [[T3]]
;
%t0 = lshr <2 x i32> %a, <i32 31, i32 31>
- %t1 = lshr <2 x i32> %b, <i32 31, i32 31>
+ %t1 = lshr <2 x i32> %b, <i32 30, i32 30>
%t2 = icmp eq <2 x i32> %t0, %t1
%t3 = zext <2 x i1> %t2 to <2 x i32>
ret <2 x i32> %t3
Index: llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp
===================================================================
--- llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp
+++ llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp
@@ -4607,12 +4607,15 @@
// (A >> C) == (B >> C) --> (A^B) u< (1 << C)
// For lshr and ashr pairs.
- if ((match(Op0, m_OneUse(m_LShr(m_Value(A), m_ConstantInt(Cst1)))) &&
- match(Op1, m_OneUse(m_LShr(m_Value(B), m_Specific(Cst1))))) ||
- (match(Op0, m_OneUse(m_AShr(m_Value(A), m_ConstantInt(Cst1)))) &&
- match(Op1, m_OneUse(m_AShr(m_Value(B), m_Specific(Cst1)))))) {
- unsigned TypeBits = Cst1->getBitWidth();
- unsigned ShAmt = (unsigned)Cst1->getLimitedValue(TypeBits);
+ const APInt *AP1, *AP2;
+ if ((match(Op0, m_OneUse(m_LShr(m_Value(A), m_APInt(AP1)))) &&
+ match(Op1, m_OneUse(m_LShr(m_Value(B), m_APInt(AP2))))) ||
+ (match(Op0, m_OneUse(m_AShr(m_Value(A), m_APInt(AP1)))) &&
+ match(Op1, m_OneUse(m_AShr(m_Value(B), m_APInt(AP2)))))) {
+ if (AP1 != AP2)
+ return nullptr;
+ unsigned TypeBits = AP1->getBitWidth();
+ unsigned ShAmt = AP1->getLimitedValue(TypeBits);
if (ShAmt < TypeBits && ShAmt != 0) {
ICmpInst::Predicate NewPred =
Pred == ICmpInst::ICMP_NE ? ICmpInst::ICMP_UGE : ICmpInst::ICMP_ULT;
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