[PATCH] D127385: [AMDGPU] Basic implementation of isExtractSubvectorCheap

[Jay Foad via Phabricator via llvm-commits]

foad added inline comments.


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Comment at: llvm/lib/Target/AMDGPU/SIISelLowering.cpp:1589
+
+  // TODO: Add more cases that are cheap.
+  return Index == 0;
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For VGPRs I think any extract starting at a dword boundary should be cheap, but for SGPRs it would need to start at a suitably aligned register number. So I don't know how to implement this.


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  https://reviews.llvm.org/D127385/new/

https://reviews.llvm.org/D127385