[llvm] 38992d2 - [InstCombine] improve fold for icmp-ugt-ashr
Chenbing Zheng via llvm-commits
llvm-commits at lists.llvm.org
Thu Jun 9 01:22:42 PDT 2022
Author: Chenbing Zheng
Date: 2022-06-09T16:22:12+08:00
New Revision: 38992d2c5e1d671cf5d4f03c7331ce98b2cdda94
URL: https://github.com/llvm/llvm-project/commit/38992d2c5e1d671cf5d4f03c7331ce98b2cdda94
DIFF: https://github.com/llvm/llvm-project/commit/38992d2c5e1d671cf5d4f03c7331ce98b2cdda94.diff
LOG: [InstCombine] improve fold for icmp-ugt-ashr
Existing condition for
fold icmp ugt (ashr X, ShAmtC), C --> icmp ugt X, ((C + 1) << ShAmtC) - 1
missed some boundary. It cause this fold don't work for some cases, and the
reason is due to signed number overflow.
Reviewed By: spatel
Differential Revision: https://reviews.llvm.org/D127188
Added:
Modified:
llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp
llvm/test/Transforms/InstCombine/icmp-shr.ll
Removed:
################################################################################
diff --git a/llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp b/llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp
index 6e61c5f7e2d96..919afafdfa6ee 100644
--- a/llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp
+++ b/llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp
@@ -2255,8 +2255,11 @@ Instruction *InstCombinerImpl::foldICmpShrConstant(ICmpInst &Cmp,
}
if (Pred == CmpInst::ICMP_UGT) {
// icmp ugt (ashr X, ShAmtC), C --> icmp ugt X, ((C + 1) << ShAmtC) - 1
+ // 'C + 1 << ShAmtC' can overflow as a signed number, so the 2nd
+ // clause accounts for that pattern.
APInt ShiftedC = (C + 1).shl(ShAmtVal) - 1;
- if ((ShiftedC + 1).ashr(ShAmtVal) == (C + 1))
+ if ((ShiftedC + 1).ashr(ShAmtVal) == (C + 1) ||
+ (C + 1).shl(ShAmtVal).isMinSignedValue())
return new ICmpInst(Pred, X, ConstantInt::get(ShrTy, ShiftedC));
}
diff --git a/llvm/test/Transforms/InstCombine/icmp-shr.ll b/llvm/test/Transforms/InstCombine/icmp-shr.ll
index cc24c8a29bd97..a6dcf136e233e 100644
--- a/llvm/test/Transforms/InstCombine/icmp-shr.ll
+++ b/llvm/test/Transforms/InstCombine/icmp-shr.ll
@@ -594,13 +594,9 @@ define i1 @ashr_ugt_2(i4 %x) {
ret i1 %r
}
-; negative test
-; TODO: This is a sign-bit test, but we don't recognize the pattern.
-
define i1 @ashr_ugt_3(i4 %x) {
; CHECK-LABEL: @ashr_ugt_3(
-; CHECK-NEXT: [[S:%.*]] = ashr i4 [[X:%.*]], 1
-; CHECK-NEXT: [[R:%.*]] = icmp ugt i4 [[S]], 3
+; CHECK-NEXT: [[R:%.*]] = icmp slt i4 [[X:%.*]], 0
; CHECK-NEXT: ret i1 [[R]]
;
%s = ashr i4 %x, 1
@@ -859,7 +855,6 @@ define i1 @ashr_ult_11(i4 %x) {
}
; negative test
-; TODO: This is a sign-bit test, but we don't recognize the pattern.
define i1 @ashr_ult_12(i4 %x) {
; CHECK-LABEL: @ashr_ult_12(
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