[llvm] 26053cd - [WebAssembly] Regenerate simd-build-vector.ll to show full codegen
Simon Pilgrim via llvm-commits
llvm-commits at lists.llvm.org
Wed Jun 8 08:54:47 PDT 2022
Author: Simon Pilgrim
Date: 2022-06-08T16:54:26+01:00
New Revision: 26053cddb420476dee59dbfb8538a72fcc5bd72b
URL: https://github.com/llvm/llvm-project/commit/26053cddb420476dee59dbfb8538a72fcc5bd72b
DIFF: https://github.com/llvm/llvm-project/commit/26053cddb420476dee59dbfb8538a72fcc5bd72b.diff
LOG: [WebAssembly] Regenerate simd-build-vector.ll to show full codegen
Added:
Modified:
llvm/test/CodeGen/WebAssembly/simd-build-vector.ll
Removed:
################################################################################
diff --git a/llvm/test/CodeGen/WebAssembly/simd-build-vector.ll b/llvm/test/CodeGen/WebAssembly/simd-build-vector.ll
index c5445943622a5..d759aa18f80e7 100644
--- a/llvm/test/CodeGen/WebAssembly/simd-build-vector.ll
+++ b/llvm/test/CodeGen/WebAssembly/simd-build-vector.ll
@@ -1,4 +1,5 @@
-; RUN: llc < %s -asm-verbose=false -verify-machineinstrs -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals -wasm-keep-registers -mattr=+simd128 | FileCheck %s
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc < %s -verify-machineinstrs -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals -wasm-keep-registers -mattr=+simd128 | FileCheck %s
; Test that the logic to choose between v128.const vector
; initialization and splat vector initialization and to optimize the
@@ -6,12 +7,13 @@
target triple = "wasm32-unknown-unknown"
-; CHECK-LABEL: same_const_one_replaced_i16x8:
-; CHECK-NEXT: .functype same_const_one_replaced_i16x8 (i32) -> (v128)
-; CHECK-NEXT: v128.const $push[[L0:[0-9]+]]=, 42, 42, 42, 42, 42, 0, 42, 42
-; CHECK-NEXT: i16x8.replace_lane $push[[L1:[0-9]+]]=, $pop[[L0]], 5, $0
-; CHECK-NEXT: return $pop[[L1]]
define <8 x i16> @same_const_one_replaced_i16x8(i16 %x) {
+; CHECK-LABEL: same_const_one_replaced_i16x8:
+; CHECK: .functype same_const_one_replaced_i16x8 (i32) -> (v128)
+; CHECK-NEXT: # %bb.0:
+; CHECK-NEXT: v128.const $push0=, 42, 42, 42, 42, 42, 0, 42, 42
+; CHECK-NEXT: i16x8.replace_lane $push1=, $pop0, 5, $0
+; CHECK-NEXT: return $pop1
%v = insertelement
<8 x i16> <i16 42, i16 42, i16 42, i16 42, i16 42, i16 42, i16 42, i16 42>,
i16 %x,
@@ -19,12 +21,13 @@ define <8 x i16> @same_const_one_replaced_i16x8(i16 %x) {
ret <8 x i16> %v
}
-; CHECK-LABEL:
diff erent_const_one_replaced_i16x8:
-; CHECK-NEXT: .functype
diff erent_const_one_replaced_i16x8 (i32) -> (v128)
-; CHECK-NEXT: v128.const $push[[L0:[0-9]+]]=, 1, -2, 3, -4, 5, 0, 7, -8
-; CHECK-NEXT: i16x8.replace_lane $push[[L1:[0-9]+]]=, $pop[[L0]], 5, $0
-; CHECK-NEXT: return $pop[[L1]]
define <8 x i16> @
diff erent_const_one_replaced_i16x8(i16 %x) {
+; CHECK-LABEL:
diff erent_const_one_replaced_i16x8:
+; CHECK: .functype
diff erent_const_one_replaced_i16x8 (i32) -> (v128)
+; CHECK-NEXT: # %bb.0:
+; CHECK-NEXT: v128.const $push0=, 1, -2, 3, -4, 5, 0, 7, -8
+; CHECK-NEXT: i16x8.replace_lane $push1=, $pop0, 5, $0
+; CHECK-NEXT: return $pop1
%v = insertelement
<8 x i16> <i16 1, i16 -2, i16 3, i16 -4, i16 5, i16 -6, i16 7, i16 -8>,
i16 %x,
@@ -32,12 +35,13 @@ define <8 x i16> @
diff erent_const_one_replaced_i16x8(i16 %x) {
ret <8 x i16> %v
}
-; CHECK-LABEL: same_const_one_replaced_f32x4:
-; CHECK-NEXT: .functype same_const_one_replaced_f32x4 (f32) -> (v128)
-; CHECK-NEXT: v128.const $push[[L0:[0-9]+]]=, 0x1.5p5, 0x1.5p5, 0x0p0, 0x1.5p5
-; CHECK-NEXT: f32x4.replace_lane $push[[L1:[0-9]+]]=, $pop[[L0]], 2, $0
-; CHECK-NEXT: return $pop[[L1]]
define <4 x float> @same_const_one_replaced_f32x4(float %x) {
+; CHECK-LABEL: same_const_one_replaced_f32x4:
+; CHECK: .functype same_const_one_replaced_f32x4 (f32) -> (v128)
+; CHECK-NEXT: # %bb.0:
+; CHECK-NEXT: v128.const $push0=, 0x1.5p5, 0x1.5p5, 0x0p0, 0x1.5p5
+; CHECK-NEXT: f32x4.replace_lane $push1=, $pop0, 2, $0
+; CHECK-NEXT: return $pop1
%v = insertelement
<4 x float> <float 42., float 42., float 42., float 42.>,
float %x,
@@ -45,12 +49,13 @@ define <4 x float> @same_const_one_replaced_f32x4(float %x) {
ret <4 x float> %v
}
-; CHECK-LABEL:
diff erent_const_one_replaced_f32x4:
-; CHECK-NEXT: .functype
diff erent_const_one_replaced_f32x4 (f32) -> (v128)
-; CHECK-NEXT: v128.const $push[[L0:[0-9]+]]=, 0x1p0, 0x1p1, 0x0p0, 0x1p2
-; CHECK-NEXT: f32x4.replace_lane $push[[L1:[0-9]+]]=, $pop[[L0]], 2, $0
-; CHECK-NEXT: return $pop[[L1]]
define <4 x float> @
diff erent_const_one_replaced_f32x4(float %x) {
+; CHECK-LABEL:
diff erent_const_one_replaced_f32x4:
+; CHECK: .functype
diff erent_const_one_replaced_f32x4 (f32) -> (v128)
+; CHECK-NEXT: # %bb.0:
+; CHECK-NEXT: v128.const $push0=, 0x1p0, 0x1p1, 0x0p0, 0x1p2
+; CHECK-NEXT: f32x4.replace_lane $push1=, $pop0, 2, $0
+; CHECK-NEXT: return $pop1
%v = insertelement
<4 x float> <float 1., float 2., float 3., float 4.>,
float %x,
@@ -58,23 +63,25 @@ define <4 x float> @
diff erent_const_one_replaced_f32x4(float %x) {
ret <4 x float> %v
}
-; CHECK-LABEL: splat_common_const_i32x4:
-; CHECK-NEXT: .functype splat_common_const_i32x4 () -> (v128)
-; CHECK-NEXT: v128.const $push[[L0:[0-9]+]]=, 0, 3, 3, 1
-; CHECK-NEXT: return $pop[[L0]]
define <4 x i32> @splat_common_const_i32x4() {
+; CHECK-LABEL: splat_common_const_i32x4:
+; CHECK: .functype splat_common_const_i32x4 () -> (v128)
+; CHECK-NEXT: # %bb.0:
+; CHECK-NEXT: v128.const $push0=, 0, 3, 3, 1
+; CHECK-NEXT: return $pop0
ret <4 x i32> <i32 undef, i32 3, i32 3, i32 1>
}
-; CHECK-LABEL: splat_common_arg_i16x8:
-; CHECK-NEXT: .functype splat_common_arg_i16x8 (i32, i32, i32) -> (v128)
-; CHECK-NEXT: i16x8.splat $push[[L0:[0-9]+]]=, $2
-; CHECK-NEXT: i16x8.replace_lane $push[[L1:[0-9]+]]=, $pop[[L0]], 0, $1
-; CHECK-NEXT: i16x8.replace_lane $push[[L2:[0-9]+]]=, $pop[[L1]], 2, $0
-; CHECK-NEXT: i16x8.replace_lane $push[[L3:[0-9]+]]=, $pop[[L2]], 4, $1
-; CHECK-NEXT: i16x8.replace_lane $push[[L4:[0-9]+]]=, $pop[[L3]], 7, $1
-; CHECK-NEXT: return $pop[[L4]]
define <8 x i16> @splat_common_arg_i16x8(i16 %a, i16 %b, i16 %c) {
+; CHECK-LABEL: splat_common_arg_i16x8:
+; CHECK: .functype splat_common_arg_i16x8 (i32, i32, i32) -> (v128)
+; CHECK-NEXT: # %bb.0:
+; CHECK-NEXT: i16x8.splat $push0=, $2
+; CHECK-NEXT: i16x8.replace_lane $push1=, $pop0, 0, $1
+; CHECK-NEXT: i16x8.replace_lane $push2=, $pop1, 2, $0
+; CHECK-NEXT: i16x8.replace_lane $push3=, $pop2, 4, $1
+; CHECK-NEXT: i16x8.replace_lane $push4=, $pop3, 7, $1
+; CHECK-NEXT: return $pop4
%v0 = insertelement <8 x i16> undef, i16 %b, i32 0
%v1 = insertelement <8 x i16> %v0, i16 %c, i32 1
%v2 = insertelement <8 x i16> %v1, i16 %a, i32 2
@@ -86,22 +93,24 @@ define <8 x i16> @splat_common_arg_i16x8(i16 %a, i16 %b, i16 %c) {
ret <8 x i16> %v7
}
-; CHECK-LABEL: swizzle_one_i8x16:
-; CHECK-NEXT: .functype swizzle_one_i8x16 (v128, v128) -> (v128)
-; CHECK-NEXT: i8x16.swizzle $push[[L0:[0-9]+]]=, $0, $1
-; CHECK-NEXT: return $pop[[L0]]
define <16 x i8> @swizzle_one_i8x16(<16 x i8> %src, <16 x i8> %mask) {
+; CHECK-LABEL: swizzle_one_i8x16:
+; CHECK: .functype swizzle_one_i8x16 (v128, v128) -> (v128)
+; CHECK-NEXT: # %bb.0:
+; CHECK-NEXT: i8x16.swizzle $push0=, $0, $1
+; CHECK-NEXT: return $pop0
%m0 = extractelement <16 x i8> %mask, i32 0
%s0 = extractelement <16 x i8> %src, i8 %m0
%v0 = insertelement <16 x i8> undef, i8 %s0, i32 0
ret <16 x i8> %v0
}
-; CHECK-LABEL: swizzle_all_i8x16:
-; CHECK-NEXT: .functype swizzle_all_i8x16 (v128, v128) -> (v128)
-; CHECK-NEXT: i8x16.swizzle $push[[L0:[0-9]+]]=, $0, $1
-; CHECK-NEXT: return $pop[[L0]]
define <16 x i8> @swizzle_all_i8x16(<16 x i8> %src, <16 x i8> %mask) {
+; CHECK-LABEL: swizzle_all_i8x16:
+; CHECK: .functype swizzle_all_i8x16 (v128, v128) -> (v128)
+; CHECK-NEXT: # %bb.0:
+; CHECK-NEXT: i8x16.swizzle $push0=, $0, $1
+; CHECK-NEXT: return $pop0
%m0 = extractelement <16 x i8> %mask, i32 0
%s0 = extractelement <16 x i8> %src, i8 %m0
%v0 = insertelement <16 x i8> undef, i8 %s0, i32 0
@@ -153,24 +162,40 @@ define <16 x i8> @swizzle_all_i8x16(<16 x i8> %src, <16 x i8> %mask) {
ret <16 x i8> %v15
}
-; CHECK-LABEL: swizzle_one_i16x8:
-; CHECK-NEXT: .functype swizzle_one_i16x8 (v128, v128) -> (v128)
-; CHECK-NOT: swizzle
-; CHECK: return
+; Ensure we don't us swizzle
define <8 x i16> @swizzle_one_i16x8(<8 x i16> %src, <8 x i16> %mask) {
+; CHECK-LABEL: swizzle_one_i16x8:
+; CHECK: .functype swizzle_one_i16x8 (v128, v128) -> (v128)
+; CHECK-NEXT: # %bb.0:
+; CHECK-NEXT: global.get $push7=, __stack_pointer
+; CHECK-NEXT: i32.const $push8=, 16
+; CHECK-NEXT: i32.sub $push10=, $pop7, $pop8
+; CHECK-NEXT: local.tee $push9=, $2=, $pop10
+; CHECK-NEXT: v128.store 0($pop9), $0
+; CHECK-NEXT: i16x8.extract_lane_u $push0=, $1, 0
+; CHECK-NEXT: i32.const $push1=, 7
+; CHECK-NEXT: i32.and $push2=, $pop0, $pop1
+; CHECK-NEXT: i32.const $push3=, 1
+; CHECK-NEXT: i32.shl $push4=, $pop2, $pop3
+; CHECK-NEXT: i32.or $push5=, $2, $pop4
+; CHECK-NEXT: v128.load16_splat $push6=, 0($pop5)
+; CHECK-NEXT: return $pop6
%m0 = extractelement <8 x i16> %mask, i32 0
%s0 = extractelement <8 x i16> %src, i16 %m0
%v0 = insertelement <8 x i16> undef, i16 %s0, i32 0
ret <8 x i16> %v0
}
-; CHECK-LABEL: half_shuffle_i32x4:
-; CHECK-NEXT: .functype half_shuffle_i32x4 (v128) -> (v128)
-; CHECK: i8x16.shuffle $push[[L0:[0-9]+]]=, $0, $0, 0, 0, 0, 0, 8, 9, 10, 11, 0, 1, 2, 3, 0, 0, 0, 0
-; CHECK: i32x4.replace_lane
-; CHECK: i32x4.replace_lane
-; CHECK: return
define <4 x i32> @half_shuffle_i32x4(<4 x i32> %src) {
+; CHECK-LABEL: half_shuffle_i32x4:
+; CHECK: .functype half_shuffle_i32x4 (v128) -> (v128)
+; CHECK-NEXT: # %bb.0:
+; CHECK-NEXT: i8x16.shuffle $push0=, $0, $0, 0, 0, 0, 0, 8, 9, 10, 11, 0, 1, 2, 3, 0, 0, 0, 0
+; CHECK-NEXT: i32.const $push1=, 0
+; CHECK-NEXT: i32x4.replace_lane $push2=, $pop0, 0, $pop1
+; CHECK-NEXT: i32.const $push3=, 3
+; CHECK-NEXT: i32x4.replace_lane $push4=, $pop2, 3, $pop3
+; CHECK-NEXT: return $pop4
%s0 = extractelement <4 x i32> %src, i32 0
%s2 = extractelement <4 x i32> %src, i32 2
%v0 = insertelement <4 x i32> undef, i32 0, i32 0
@@ -180,16 +205,19 @@ define <4 x i32> @half_shuffle_i32x4(<4 x i32> %src) {
ret <4 x i32> %v3
}
-; CHECK-LABEL: mashup_swizzle_i8x16:
-; CHECK-NEXT: .functype mashup_swizzle_i8x16 (v128, v128, i32) -> (v128)
-; CHECK-NEXT: i8x16.swizzle $push[[L0:[0-9]+]]=, $0, $1
-; CHECK: i8x16.replace_lane
-; CHECK: i8x16.replace_lane
-; CHECK: i8x16.replace_lane
-; CHECK: i8x16.replace_lane
-; CHECK: return
define <16 x i8> @mashup_swizzle_i8x16(<16 x i8> %src, <16 x i8> %mask, i8 %splatted) {
; swizzle 0
+; CHECK-LABEL: mashup_swizzle_i8x16:
+; CHECK: .functype mashup_swizzle_i8x16 (v128, v128, i32) -> (v128)
+; CHECK-NEXT: # %bb.0:
+; CHECK-NEXT: i8x16.swizzle $push0=, $0, $1
+; CHECK-NEXT: i8x16.replace_lane $push1=, $pop0, 3, $2
+; CHECK-NEXT: i32.const $push2=, 42
+; CHECK-NEXT: i8x16.replace_lane $push3=, $pop1, 4, $pop2
+; CHECK-NEXT: i8x16.replace_lane $push4=, $pop3, 12, $2
+; CHECK-NEXT: i32.const $push6=, 42
+; CHECK-NEXT: i8x16.replace_lane $push5=, $pop4, 14, $pop6
+; CHECK-NEXT: return $pop5
%m0 = extractelement <16 x i8> %mask, i32 0
%s0 = extractelement <16 x i8> %src, i8 %m0
%v0 = insertelement <16 x i8> undef, i8 %s0, i32 0
@@ -208,15 +236,25 @@ define <16 x i8> @mashup_swizzle_i8x16(<16 x i8> %src, <16 x i8> %mask, i8 %spla
ret <16 x i8> %v5
}
-; CHECK-LABEL: mashup_const_i8x16:
-; CHECK-NEXT: .functype mashup_const_i8x16 (v128, v128, i32) -> (v128)
-; CHECK: v128.const $push[[L0:[0-9]+]]=, 0, 0, 0, 0, 42, 0, 0, 0, 0, 0, 0, 0, 0, 0, 42, 0
-; CHECK: v128.load8_lane
-; CHECK: i8x16.replace_lane
-; CHECK: i8x16.replace_lane
-; CHECK: return
define <16 x i8> @mashup_const_i8x16(<16 x i8> %src, <16 x i8> %mask, i8 %splatted) {
; swizzle 0
+; CHECK-LABEL: mashup_const_i8x16:
+; CHECK: .functype mashup_const_i8x16 (v128, v128, i32) -> (v128)
+; CHECK-NEXT: # %bb.0:
+; CHECK-NEXT: global.get $push8=, __stack_pointer
+; CHECK-NEXT: i32.const $push9=, 16
+; CHECK-NEXT: i32.sub $push11=, $pop8, $pop9
+; CHECK-NEXT: local.tee $push10=, $3=, $pop11
+; CHECK-NEXT: v128.store 0($pop10), $0
+; CHECK-NEXT: i8x16.extract_lane_u $push0=, $1, 0
+; CHECK-NEXT: i32.const $push1=, 15
+; CHECK-NEXT: i32.and $push2=, $pop0, $pop1
+; CHECK-NEXT: i32.or $push3=, $3, $pop2
+; CHECK-NEXT: v128.const $push4=, 0, 0, 0, 0, 42, 0, 0, 0, 0, 0, 0, 0, 0, 0, 42, 0
+; CHECK-NEXT: v128.load8_lane $push5=, 0($pop3), $pop4, 0
+; CHECK-NEXT: i8x16.replace_lane $push6=, $pop5, 3, $2
+; CHECK-NEXT: i8x16.replace_lane $push7=, $pop6, 12, $2
+; CHECK-NEXT: return $pop7
%m0 = extractelement <16 x i8> %mask, i32 0
%s0 = extractelement <16 x i8> %src, i8 %m0
%v0 = insertelement <16 x i8> undef, i8 %s0, i32 0
@@ -231,14 +269,25 @@ define <16 x i8> @mashup_const_i8x16(<16 x i8> %src, <16 x i8> %mask, i8 %splatt
ret <16 x i8> %v4
}
-; CHECK-LABEL: mashup_splat_i8x16:
-; CHECK-NEXT: .functype mashup_splat_i8x16 (v128, v128, i32) -> (v128)
-; CHECK: i8x16.splat $push[[L0:[0-9]+]]=, $2
-; CHECK: v128.load8_lane
-; CHECK: i8x16.replace_lane
-; CHECK: return
define <16 x i8> @mashup_splat_i8x16(<16 x i8> %src, <16 x i8> %mask, i8 %splatted) {
; swizzle 0
+; CHECK-LABEL: mashup_splat_i8x16:
+; CHECK: .functype mashup_splat_i8x16 (v128, v128, i32) -> (v128)
+; CHECK-NEXT: # %bb.0:
+; CHECK-NEXT: global.get $push8=, __stack_pointer
+; CHECK-NEXT: i32.const $push9=, 16
+; CHECK-NEXT: i32.sub $push11=, $pop8, $pop9
+; CHECK-NEXT: local.tee $push10=, $3=, $pop11
+; CHECK-NEXT: v128.store 0($pop10), $0
+; CHECK-NEXT: i8x16.extract_lane_u $push0=, $1, 0
+; CHECK-NEXT: i32.const $push1=, 15
+; CHECK-NEXT: i32.and $push2=, $pop0, $pop1
+; CHECK-NEXT: i32.or $push3=, $3, $pop2
+; CHECK-NEXT: i8x16.splat $push4=, $2
+; CHECK-NEXT: v128.load8_lane $push5=, 0($pop3), $pop4, 0
+; CHECK-NEXT: i32.const $push6=, 42
+; CHECK-NEXT: i8x16.replace_lane $push7=, $pop5, 4, $pop6
+; CHECK-NEXT: return $pop7
%m0 = extractelement <16 x i8> %mask, i32 0
%s0 = extractelement <16 x i8> %src, i8 %m0
%v0 = insertelement <16 x i8> undef, i8 %s0, i32 0
@@ -251,36 +300,39 @@ define <16 x i8> @mashup_splat_i8x16(<16 x i8> %src, <16 x i8> %mask, i8 %splatt
ret <16 x i8> %v3
}
-; CHECK-LABEL: undef_const_insert_f32x4:
-; CHECK-NEXT: .functype undef_const_insert_f32x4 () -> (v128)
-; CHECK-NEXT: v128.const $push[[L0:[0-9]+]]=, 0x0p0, 0x1.5p5, 0x0p0, 0x0p0
-; CHECK-NEXT: return $pop[[L0]]
-; SIMD-VM: f32x4.splat
define <4 x float> @undef_const_insert_f32x4() {
+; CHECK-LABEL: undef_const_insert_f32x4:
+; CHECK: .functype undef_const_insert_f32x4 () -> (v128)
+; CHECK-NEXT: # %bb.0:
+; CHECK-NEXT: v128.const $push0=, 0x0p0, 0x1.5p5, 0x0p0, 0x0p0
+; CHECK-NEXT: return $pop0
%v = insertelement <4 x float> undef, float 42., i32 1
ret <4 x float> %v
}
-; CHECK-LABEL: undef_arg_insert_i32x4:
-; CHECK-NEXT: .functype undef_arg_insert_i32x4 (i32) -> (v128)
-; CHECK-NEXT: i32x4.splat $push[[L0:[0-9]+]]=, $0
-; CHECK-NEXT: return $pop[[L0]]
define <4 x i32> @undef_arg_insert_i32x4(i32 %x) {
+; CHECK-LABEL: undef_arg_insert_i32x4:
+; CHECK: .functype undef_arg_insert_i32x4 (i32) -> (v128)
+; CHECK-NEXT: # %bb.0:
+; CHECK-NEXT: i32x4.splat $push0=, $0
+; CHECK-NEXT: return $pop0
%v = insertelement <4 x i32> undef, i32 %x, i32 3
ret <4 x i32> %v
}
-; CHECK-LABEL: all_undef_i8x16:
-; CHECK-NEXT: .functype all_undef_i8x16 () -> (v128)
-; CHECK-NEXT: return $0
define <16 x i8> @all_undef_i8x16() {
+; CHECK-LABEL: all_undef_i8x16:
+; CHECK: .functype all_undef_i8x16 () -> (v128)
+; CHECK-NEXT: # %bb.0:
+; CHECK-NEXT: return $0
%v = insertelement <16 x i8> undef, i8 undef, i32 4
ret <16 x i8> %v
}
-; CHECK-LABEL: all_undef_f64x2:
-; CHECK-NEXT: .functype all_undef_f64x2 () -> (v128)
-; CHECK-NEXT: return $0
define <2 x double> @all_undef_f64x2() {
+; CHECK-LABEL: all_undef_f64x2:
+; CHECK: .functype all_undef_f64x2 () -> (v128)
+; CHECK-NEXT: # %bb.0:
+; CHECK-NEXT: return $0
ret <2 x double> undef
}
More information about the llvm-commits
mailing list