[PATCH] D127276: [RISCV] Lower build_vector of VID sequence with one inconsistent element to vid and insert_vector_elt.

[Philip Reames via Phabricator via llvm-commits]

reames added inline comments.


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Comment at: llvm/lib/Target/RISCV/RISCVISelLowering.cpp:1914
+  for (size_t i = 0; i < Op.getNumOperands(); i++)
+    if (auto VS = isSimpleVIDSequenceImpl(Op, i))
+      return VS;
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This is algorithmically slow.  

You can achieve the same effect with a direct change to the matching code which allows it to fuzzy match exactly one element.  

Doing so is non trivial, but once you find the first three non-undefs in the sequence it should be easy to distinguish.


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Comment at: llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fp-shuffles.ll:142
+; RV32-NEXT:    vsetvli zero, zero, e16, mf2, tu, mu
+; RV32-NEXT:    vmv.s.x v14, a0
 ; RV32-NEXT:    vsetvli zero, zero, e64, m2, ta, mu
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Its not clear to me that a six instruction sequence is worthwhile to remove a constant pool entry.  Can you make an argument as to why this change is worthwhile?


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D127276/new/

https://reviews.llvm.org/D127276