[PATCH] D127281: [Greedy RegAlloc] Fix the handling of split register in last chance re-coloring.

[Matt Arsenault via Phabricator via llvm-commits]

arsenm added inline comments.


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Comment at: llvm/test/CodeGen/AArch64/regalloc-last-chance-recolor-with-split.mir:1
-# RUN: not --crash llc -mattr="+reserve-x28" --start-before=greedy -verify-machineinstrs %s -o - 2>&1 | FileCheck %s
+# RUN: llc -mattr="+reserve-x28" --start-before=greedy -verify-machineinstrs %s -o - 2>&1 | FileCheck %s
 
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Why still redirect stderr?


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Comment at: llvm/test/CodeGen/AArch64/regalloc-last-chance-recolor-with-split.mir:3
 
-# CHECK: Non-empty but used interval
+# CHECK-LABEL: ham
 
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This should get some actual checks, probably should just use update_mir_test_checks


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Comment at: llvm/test/CodeGen/AMDGPU/remaining-virtual-register-operands.ll:8-11
+; The machine verifier complains about usage of register
+; which is marked as killed in previous instruction.
+; This happens due to when register allocator is out of registers
+; it takes the first avialable register.
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This is the problem D122616 is trying to solve


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D127281/new/

https://reviews.llvm.org/D127281