[PATCH] D126726: [X86][Disassembler] Fix displacement operand size for symbolizer

[Kan Shengchen via Phabricator via llvm-commits]

skan added inline comments.


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Comment at: llvm/lib/Target/X86/Disassembler/X86Disassembler.cpp:505
       insn->addressSize = (insn->hasAdSize ? 4 : 8);
-      insn->displacementSize = (insn->hasOpSize ? 2 : 4);
+      insn->displacementSize = 4;
       insn->immediateSize = (insn->hasOpSize ? 2 : 4);
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Mov this statement to the scope of `else if (insn->mode == MODE_64BIT) {`?


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Comment at: llvm/unittests/MC/X86/X86MCDisassemblerTest.cpp:149
+  // size override prefix.
+  checkBytes({0x66, 0x89, 0x05, 0x79, 0x81, 0x56, 0x01});
+  checkOperand(0, 0x1568180, 3, 4);
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Could we use another register such as `rbx` as base register in this test? `rip` always use 32-bit displacement.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D126726/new/

https://reviews.llvm.org/D126726