[PATCH] D126628: [JITLink][AARCH64][NFC] Create isLoadStoreImm12 function by splitting getPageOffset12Shift
Lang Hames via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Tue Jun 7 13:18:34 PDT 2022
This revision was landed with ongoing or failed builds.
This revision was automatically updated to reflect the committed changes.
Closed by commit rG9f29916169fa: [JITLink][AArch64] Refactor isLoadStoreImm12 check out of getPageOffset12Shift. (authored by sunho, committed by lhames).
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D126628/new/
https://reviews.llvm.org/D126628
Files:
llvm/include/llvm/ExecutionEngine/JITLink/aarch64.h
llvm/lib/ExecutionEngine/JITLink/aarch64.cpp
Index: llvm/lib/ExecutionEngine/JITLink/aarch64.cpp
===================================================================
--- llvm/lib/ExecutionEngine/JITLink/aarch64.cpp
+++ llvm/lib/ExecutionEngine/JITLink/aarch64.cpp
@@ -18,11 +18,15 @@
namespace jitlink {
namespace aarch64 {
-unsigned getPageOffset12Shift(uint32_t Instr) {
+bool isLoadStoreImm12(uint32_t Instr) {
constexpr uint32_t LoadStoreImm12Mask = 0x3b000000;
+ return (Instr & LoadStoreImm12Mask) == 0x39000000;
+}
+
+unsigned getPageOffset12Shift(uint32_t Instr) {
constexpr uint32_t Vec128Mask = 0x04800000;
- if ((Instr & LoadStoreImm12Mask) == 0x39000000) {
+ if (isLoadStoreImm12(Instr)) {
uint32_t ImplicitShift = Instr >> 30;
if (ImplicitShift == 0)
if ((Instr & Vec128Mask) == Vec128Mask)
Index: llvm/include/llvm/ExecutionEngine/JITLink/aarch64.h
===================================================================
--- llvm/include/llvm/ExecutionEngine/JITLink/aarch64.h
+++ llvm/include/llvm/ExecutionEngine/JITLink/aarch64.h
@@ -43,6 +43,8 @@
/// only
const char *getEdgeKindName(Edge::Kind K);
+bool isLoadStoreImm12(uint32_t Instr);
+
unsigned getPageOffset12Shift(uint32_t Instr);
Error applyFixup(LinkGraph &G, Block &B, const Edge &E);
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