[PATCH] D127118: [AArch64] Autogenerate sve-fixed-length tests. NFC
Simon Pilgrim via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Tue Jun 7 10:25:38 PDT 2022
RKSimon added a reviewer: RKSimon.
RKSimon added inline comments.
================
Comment at: llvm/test/CodeGen/AArch64/sve-fixed-length-extract-subvector.ll:4
; RUN: llc -aarch64-sve-vector-bits-min=256 < %s | FileCheck %s -check-prefixes=CHECK,VBITS_EQ_256
; RUN: llc -aarch64-sve-vector-bits-min=384 < %s | FileCheck %s -check-prefixes=CHECK
; RUN: llc -aarch64-sve-vector-bits-min=512 < %s | FileCheck %s -check-prefixes=CHECK,VBITS_GE_512
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Please can you -check-prefixes=CHECK,VBITS_GE_384 to the tests?
Repository:
rG LLVM Github Monorepo
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https://reviews.llvm.org/D127118/new/
https://reviews.llvm.org/D127118
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