[PATCH] D126794: [RISCV] Lower VLEFF/VLSEGFF SDNodes to MachineInstrs with VL outputs.
Yeting Kuo via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Mon Jun 6 21:40:46 PDT 2022
fakepaper56 added inline comments.
================
Comment at: llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td:695
+class VPseudoUSLoadFFNoMask<VReg RetClass, int EEW, bit DummyMask = 1> :
+ Pseudo<(outs RetClass:$rd, GPR:$vl),
----------------
craig.topper wrote:
> fakepaper56 wrote:
> > reames wrote:
> > > Unless I'm missing something, the need for separate FF pseudos disappears once you remove the VLOperand flag doesn't it?
> > The VLOperand you mentioned is HasVLOutput in my code? I think we should still use separate FF pseudos, since the output of VLEFF/VLSEGFF needs two explicit defines.
> Did we rule out making it an OptionalDef and setting the def to NoRegister?
Sorry I forgot OptionalDef, I will try to use it.
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rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D126794/new/
https://reviews.llvm.org/D126794
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