[PATCH] D127122: [InstCombine] reduce right-shift-of-left-shifted constant via demanded bits

[chenglin.bi via Phabricator via llvm-commits]

bcl5980 added inline comments.


================
Comment at: llvm/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp:640
+        const APInt *C;
+        if (match(I->getOperand(0), m_Shl(m_APInt(C), m_Value(X))) &&
+            C->countTrailingZeros() >= ShiftAmt) {
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spatel wrote:
> RKSimon wrote:
> > Why limit this to (scalar) constants instead of using KnownBits::countMinTrailingZeros?
> Mainly because that was always part of the motivating examples. :)
> 
> If we use known bits here, then the new lshr is potentially not constant-folded away. We could do that, but then we would need to limit the match with one-use. 
> 
> I don't have a strong preference. We could make it another small follow-on if that seems like a better transform.
Maybe we can try to match Constant instead of APInt then computeKnownBits for it. It can help to detect vector constant also.


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  https://reviews.llvm.org/D127122/new/

https://reviews.llvm.org/D127122