[PATCH] D127109: llvm-reduce: Don't assert on functions which don't track liveness

[Matt Arsenault via Phabricator via llvm-commits]

arsenm updated this revision to Diff 434632.
arsenm added a comment.
Herald added subscribers: jsji, kosarev, pcwang-thead, frasercrmck, kerbowa, luismarques, apazos, sameer.abuasal, pengfei, s.egerton, Jim, jocewei, PkmX, arphaman, the_o, brucehoult, MartinMosbeck, rogfer01, atanasyan, edward-jones, zzheng, MaskRay, jrtc27, niosHD, sabuasal, simoncook, johnrusso, rbar, asb, hiraditya, arichardson, jvesely, sdardis.

Use non-asserting functions in serialization contexts (which should probably be renamed)


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D127109/new/

https://reviews.llvm.org/D127109

Files:
  llvm/include/llvm/CodeGen/MachineBasicBlock.h
  llvm/lib/CodeGen/MIRPrinter.cpp
  llvm/test/CodeGen/AArch64/GlobalISel/opt-and-tbnz-tbz.mir
  llvm/test/CodeGen/AArch64/GlobalISel/opt-fold-shift-tbz-tbnz.mir
  llvm/test/CodeGen/AArch64/GlobalISel/opt-fold-xor-tbz-tbnz.mir
  llvm/test/CodeGen/AArch64/GlobalISel/select-brcond-of-binop.mir
  llvm/test/CodeGen/AArch64/GlobalISel/select-cbz.mir
  llvm/test/CodeGen/AArch64/GlobalISel/tbnz-slt.mir
  llvm/test/CodeGen/AArch64/GlobalISel/tbz-sgt.mir
  llvm/test/CodeGen/AArch64/branch-target-enforcement.mir
  llvm/test/CodeGen/AArch64/expand-blr-rvmarker-pseudo.mir
  llvm/test/CodeGen/AArch64/framelayout-sve.mir
  llvm/test/CodeGen/AMDGPU/hazard-buffer-store-v-interp.mir
  llvm/test/CodeGen/AMDGPU/optimize-compare.mir
  llvm/test/CodeGen/MIR/AArch64/mirnamer.mir
  llvm/test/CodeGen/Mips/shrink-wrap-buildpairf64-extractelementf64.mir
  llvm/test/CodeGen/RISCV/copy-frameindex.mir
  llvm/test/CodeGen/X86/flags-copy-lowering.mir
  llvm/test/CodeGen/X86/optimize-compare.mir
  llvm/test/tools/UpdateTestChecks/update_mir_test_checks/Inputs/x86-condbr.mir.expected
  llvm/test/tools/llvm-reduce/mir/tracks-reg-liveness.mir
  llvm/tools/llvm-reduce/ReducerWorkItem.cpp

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