[PATCH] D127115: [RFC][DAGCombine] Make sure combined nodes are added back to the worklist in topological order.

Mon Jun 6 13:28:13 PDT 2022

jrtc27 added inline comments.

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Comment at: llvm/test/CodeGen/AMDGPU/divergence-driven-buildvector.ll:1
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
 ; RUN: llc -march=amdgcn -stop-after=amdgpu-isel < %s | FileCheck -check-prefix=GCN %s
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deadalnix wrote:
> RKSimon wrote:
> > The update script doesn't work for  "-stop-after=" RUNs, so you'll have to address the broken CHECKs manually :( 
> Ho yes, I went a bit heavy handed on this, I'll try to track these.
Does it not work with update_mir_test_checks.py? For MIR output that’s what I’d expect to be used and work; this definitely won’t as it’s expecting true assembly output.

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D127115/new/

https://reviews.llvm.org/D127115