[PATCH] D127143: [AMDGPU] gfx11 MC asm printer/parser tweaks

[Joe Nash via Phabricator via llvm-commits]

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This patch includes a few tweaks to fields, printing and parsing for gfx11.
We add bits to COMPUTE_PGM_RSRC3.
On GFX11+, EXECZ and VCCZ are no longer allowed to be used as
sources to SALU and VALU instructions.
The encoding of COMPUTE_TMPRING_SIZE.WAVESIZE and SPI_TMPRING_SIZE.WAVESIZE
is now in units of 64 dwords instead of 256 dwords, and the field has been
widened.

Contributors:
Konstantin Zhuravlyov <kzhuravl_dev at outlook.com>
Baptiste Saleil <baptiste.saleil at amd.com>
Jay Foad <jay.foad at amd.com>

Patch 20/N for upstreaming of AMDGPU gfx11 architecture

Depends on D126989 <https://reviews.llvm.org/D126989>


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D127143

Files:
  llvm/include/llvm/Support/AMDHSAKernelDescriptor.h
  llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp
  llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
  llvm/lib/Target/AMDGPU/GCNSubtarget.h
  llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUTargetStreamer.cpp
  llvm/lib/Target/AMDGPU/SIDefines.h
  llvm/test/MC/AMDGPU/gfx10-constant-bus.s
  llvm/test/MC/AMDGPU/gfx11_asm_operands.s
  llvm/test/MC/AMDGPU/hsa-gfx11-v3.s
  llvm/test/MC/Disassembler/AMDGPU/decode-err.txt

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