[llvm] be39810 - [SelectionDAG] Further improve computeKnownBits for (smax X, C) where C is non-negative.

[Craig Topper via llvm-commits]

Author: Craig Topper
Date: 2022-06-06T09:59:23-07:00
New Revision: be398100eaf5a59146170167e34ffc7ba880c88e

URL: https://github.com/llvm/llvm-project/commit/be398100eaf5a59146170167e34ffc7ba880c88e
DIFF: https://github.com/llvm/llvm-project/commit/be398100eaf5a59146170167e34ffc7ba880c88e.diff

LOG: [SelectionDAG] Further improve computeKnownBits for (smax X, C) where C is non-negative.

Move the code that was added for D126896 after the normal recursive calls
to computeKnownBits. This allows us to calculate trailing zeros.
Previously we would break out of the switch before the recursive calls.

Added: 
    

Modified: 
    llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
    llvm/test/CodeGen/RISCV/min-max.ll

Removed: 
    


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diff  --git a/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp b/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
index aedbeb342b636..6dfdfa7907dea 100644
--- a/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
@@ -3697,6 +3697,14 @@ KnownBits SelectionDAG::computeKnownBits(SDValue Op, const APInt &DemandedElts,
         }
       }
     }
+
+    Known = computeKnownBits(Op.getOperand(0), DemandedElts, Depth + 1);
+    Known2 = computeKnownBits(Op.getOperand(1), DemandedElts, Depth + 1);
+    if (IsMax)
+      Known = KnownBits::smax(Known, Known2);
+    else
+      Known = KnownBits::smin(Known, Known2);
+
     // For SMAX, if CstLow is non-negative we know the result will be
     // non-negative and thus all sign bits are 0.
     // TODO: There's an equivalent of this for smin with negative constant for
@@ -3706,16 +3714,9 @@ KnownBits SelectionDAG::computeKnownBits(SDValue Op, const APInt &DemandedElts,
       if (ValueLow.isNonNegative()) {
         unsigned SignBits = ComputeNumSignBits(Op.getOperand(0), Depth + 1);
         Known.Zero.setHighBits(std::min(SignBits, ValueLow.getNumSignBits()));
-        break;
       }
     }
 
-    Known = computeKnownBits(Op.getOperand(0), DemandedElts, Depth + 1);
-    Known2 = computeKnownBits(Op.getOperand(1), DemandedElts, Depth + 1);
-    if (IsMax)
-      Known = KnownBits::smax(Known, Known2);
-    else
-      Known = KnownBits::smin(Known, Known2);
     break;
   }
   case ISD::FP_TO_UINT_SAT: {

diff  --git a/llvm/test/CodeGen/RISCV/min-max.ll b/llvm/test/CodeGen/RISCV/min-max.ll
index 4db6bfc567ebd..cd3272b6647e1 100644
--- a/llvm/test/CodeGen/RISCV/min-max.ll
+++ b/llvm/test/CodeGen/RISCV/min-max.ll
@@ -638,3 +638,26 @@ define signext i32 @smax_i32_pos_constant(i32 signext %a) {
   %c = call i32 @llvm.smax.i32(i32 %a, i32 10)
   ret i32 %c
 }
+
+define signext i32 @smax_i32_pos_constant_trailing_zeros(i32 signext %a) {
+; NOZBB-LABEL: smax_i32_pos_constant_trailing_zeros:
+; NOZBB:       # %bb.0:
+; NOZBB-NEXT:    andi a0, a0, -8
+; NOZBB-NEXT:    li a1, 16
+; NOZBB-NEXT:    blt a1, a0, .LBB25_2
+; NOZBB-NEXT:  # %bb.1:
+; NOZBB-NEXT:    li a0, 16
+; NOZBB-NEXT:  .LBB25_2:
+; NOZBB-NEXT:    ret
+;
+; ZBB-LABEL: smax_i32_pos_constant_trailing_zeros:
+; ZBB:       # %bb.0:
+; ZBB-NEXT:    andi a0, a0, -8
+; ZBB-NEXT:    li a1, 16
+; ZBB-NEXT:    max a0, a0, a1
+; ZBB-NEXT:    ret
+  %b = and i32 %a, -8
+  %c = call i32 @llvm.smax.i32(i32 %b, i32 16)
+  %d = and i32 %c, -4
+  ret i32 %d
+}