[PATCH] D127115: [RFC][DAGCombine] Make sure combined nodes are added back to the worklist in topological order.

Florian Hahn via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Mon Jun 6 09:58:40 PDT 2022


fhahn added a comment.

Thanks for sharing the patch.

> We want to move the DAGCombiner toward processing the node in topological order. Inf act, implementing such as change in the combiner itself is not a major challenge, and I have patches which can do so for quite some time now.

I think what's missing from the description is *why* moving towards this new processing order is desirable, which is not obvious unless I am missing something.

I had a quick look at some of the changes in the AArch64 tests and it seems the ones I glanced at are all regressing.



================
Comment at: llvm/test/CodeGen/AArch64/sve-fixed-length-ext-loads.ll:1
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
 ; RUN: llc -aarch64-sve-vector-bits-min=128  < %s | FileCheck %s -D#VBYTES=16  -check-prefix=NO_SVE
----------------
auto-generating the checks here makes it hard to see what the real difference in codegen is.


Repository:
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https://reviews.llvm.org/D127115



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