[PATCH] D127123: [AMDGPU] Add more expressive sched_barrier controls

Austin Kerbow via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Mon Jun 6 08:58:00 PDT 2022


kerbowa created this revision.
kerbowa added reviewers: jrbyrnes, rampitec, vangthao95, arsenm.
Herald added subscribers: kosarev, jsilvanus, hsmhsm, foad, hiraditya, t-tye, tpr, dstuttard, yaxunl, nhaehnle, jvesely, kzhuravl.
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kerbowa requested review of this revision.
Herald added subscribers: llvm-commits, wdng.
Herald added a project: LLVM.

The sched_barrier builtin allow the scheduler's behavior to be shaped by users
when very specific codegen is needed in order to create highly optimized code.
This patch adds more granular control over the types of instructions that are
allowed to be reordered with respect to one or multiple sched_barriers. A mask
is used to specify groups of instructions that should be allowed to be scheduled
around a sched_barrier. The details about this mask may be used can be found in
llvm/include/llvm/IR/IntrinsicsAMDGPU.td.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D127123

Files:
  llvm/include/llvm/IR/IntrinsicsAMDGPU.td
  llvm/lib/Target/AMDGPU/AMDGPUMFMAIGroupLP.cpp
  llvm/lib/Target/AMDGPU/AMDGPUMFMAIGroupLP.h
  llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
  llvm/lib/Target/AMDGPU/SIInstructions.td
  llvm/test/CodeGen/AMDGPU/llvm.amdgcn.sched.barrier.ll
  llvm/test/CodeGen/AMDGPU/mfma-igrouplp-dag-mutation.mir
  llvm/test/CodeGen/AMDGPU/sched_barrier.mir

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