[PATCH] D126896: [DAGCombiner][RISCV] Improve computeKnownBits for (smax X, C) where C is non-negative.
Jay Foad via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Mon Jun 6 04:02:51 PDT 2022
foad added inline comments.
================
Comment at: llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp:3709
+ Known.Zero.setHighBits(std::min(SignBits, ValueLow.getNumSignBits()));
+ break;
+ }
----------------
If you break here you don't call smin/smax below, which could compute known low order bits in the result. Wouldn't it be better to add this new code after the calls to smin/smax below, to improve the result that they calculate?
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D126896/new/
https://reviews.llvm.org/D126896
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