[PATCH] D126854: [RISCV] Define risc-v's own register class to model FP Register.
Kito Cheng via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Mon Jun 6 00:14:54 PDT 2022
kito-cheng added a comment.
> Sorry I didn't notice. I have submitted it.
You could create another NFC patch to address @frasercrmck's comment :)
Repository:
rG LLVM Github Monorepo
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https://reviews.llvm.org/D126854/new/
https://reviews.llvm.org/D126854
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