[PATCH] D127071: [X86][AMX] Fallback to multi-config if single-config fails.

LuoYuanke via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Sun Jun 5 05:35:28 PDT 2022


LuoYuanke created this revision.
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Single config would fail if the shape dependency is unresolved and it
cause compiling failure. To overcome the shape dependency issue, we can
fallback to multi-config solution, so that it can be compiled
successfully but with less performance because the extra configure and
spill/reload overhead.
The signle config pass would set the flag HasSingleTileConfig true if it
successfully config the function. The multi/fast config pass follows the
single config pass and check the flag HasSingleTileConfig to determine
if the function has been single configured. If not multi/fast config
pass would config the function again.
We have a separate RA to allocate tile register, so that both single
config and multi/fast config can works well with it.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D127071

Files:
  llvm/include/llvm/CodeGen/TargetPassConfig.h
  llvm/lib/CodeGen/TargetPassConfig.cpp
  llvm/lib/CodeGen/VirtRegMap.cpp
  llvm/lib/Target/X86/CMakeLists.txt
  llvm/lib/Target/X86/X86FastPreTileConfig.cpp
  llvm/lib/Target/X86/X86FastTileConfig.cpp
  llvm/lib/Target/X86/X86MachineFunctionInfo.h
  llvm/lib/Target/X86/X86PreTileConfig.cpp
  llvm/lib/Target/X86/X86TargetMachine.cpp
  llvm/lib/Target/X86/X86TileConfig.cpp
  llvm/lib/Target/X86/X86TileConfigUtils.cpp
  llvm/lib/Target/X86/X86TileConfigUtils.h
  llvm/test/CodeGen/Generic/live-debug-label.ll
  llvm/test/CodeGen/X86/AMX/amx-across-func.ll
  llvm/test/CodeGen/X86/AMX/amx-config-fallback.ll
  llvm/test/CodeGen/X86/AMX/amx-error.ll
  llvm/test/CodeGen/X86/AMX/amx-lower-tile-copy.ll
  llvm/test/CodeGen/X86/AMX/amx-spill-merge.ll
  llvm/test/CodeGen/X86/opt-pipeline.ll
  llvm/test/CodeGen/X86/statepoint-ra.ll
  llvm/test/CodeGen/X86/statepoint-vreg-details.ll
  llvm/test/CodeGen/X86/statepoint-vreg-invoke.ll
  llvm/test/CodeGen/X86/statepoint-vreg-unlimited-tied-opnds.ll
  llvm/test/DebugInfo/MIR/InstrRef/memory-operand-folding-tieddef.mir
  llvm/test/DebugInfo/MIR/InstrRef/memory-operand-folding.mir
  llvm/test/DebugInfo/MIR/InstrRef/memory-operand-load-folding.mir
  llvm/test/DebugInfo/MIR/InstrRef/phi-coalesce-subreg.mir
  llvm/test/DebugInfo/MIR/InstrRef/phi-on-stack-coalesced.mir
  llvm/test/DebugInfo/MIR/InstrRef/phi-on-stack-coalesced2.mir
  llvm/test/DebugInfo/MIR/InstrRef/survives-livedebugvars.mir
  llvm/test/DebugInfo/MIR/X86/dvl-livedebugvars-movements.mir
  llvm/test/DebugInfo/MIR/X86/dvl-livedebugvars-stackptr.mir
  llvm/test/DebugInfo/MIR/X86/empty-inline.mir
  llvm/test/DebugInfo/MIR/X86/live-debug-vars-unused-arg-debugonly.mir
  llvm/test/DebugInfo/MIR/X86/live-debug-vars-unused-arg.mir
  llvm/test/DebugInfo/MIR/X86/livedebugvars-crossbb-interval.mir
  llvm/test/DebugInfo/X86/live-debug-vars-discard-invalid.mir
  llvm/test/DebugInfo/X86/live-debug-vars-intervals.mir
  llvm/test/DebugInfo/X86/live-debug-vars-loc-limit.ll

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