[PATCH] D127055: [ARM] Merge duplicated Thumb2SizeReduce code (NFC)

[ksyx via Phabricator via llvm-commits]

ksyx created this revision.
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Merge duplicated code into procedure for code cleanness and readability and use `llvm::dbgs()` instead of `errs()` for consistency with other parts.


https://reviews.llvm.org/D127055

Files:
  llvm/lib/Target/ARM/Thumb2SizeReduction.cpp


Index: llvm/lib/Target/ARM/Thumb2SizeReduction.cpp
===================================================================
--- llvm/lib/Target/ARM/Thumb2SizeReduction.cpp
+++ llvm/lib/Target/ARM/Thumb2SizeReduction.cpp
@@ -187,6 +187,9 @@
                          bool is2Addr, ARMCC::CondCodes Pred,
                          bool LiveCPSR, bool &HasCC, bool &CCDead);
 
+    void PerformReduce(MachineBasicBlock &MBB, MachineInstr *MI,
+                       MachineInstrBuilder &MIB, llvm::Statistic &Counter);
+
     bool ReduceLoadStore(MachineBasicBlock &MBB, MachineInstr *MI,
                          const ReduceEntry &Entry);
 
@@ -401,6 +404,21 @@
   return true;
 }
 
+
+void
+Thumb2SizeReduce::PerformReduce(MachineBasicBlock &MBB, MachineInstr *MI,
+                                MachineInstrBuilder &MIB,
+                                llvm::Statistic &Counter) {
+  // Transfer MI flags.
+  MIB.setMIFlags(MI->getFlags());
+
+  LLVM_DEBUG(llvm::dbgs() << "Converted 32-bit: " << *MI
+                          << "       to 16-bit: " << *MIB);
+
+  MBB.erase_instr(MI);
+  ++Counter;
+}
+
 bool
 Thumb2SizeReduce::ReduceLoadStore(MachineBasicBlock &MBB, MachineInstr *MI,
                                   const ReduceEntry &Entry) {
@@ -618,14 +636,7 @@
   // Transfer memoperands.
   MIB.setMemRefs(MI->memoperands());
 
-  // Transfer MI flags.
-  MIB.setMIFlags(MI->getFlags());
-
-  LLVM_DEBUG(errs() << "Converted 32-bit: " << *MI
-                    << "       to 16-bit: " << *MIB);
-
-  MBB.erase_instr(MI);
-  ++NumLdSts;
+  PerformReduce(MBB, MI, MIB, NumLdSts);
   return true;
 }
 
@@ -666,14 +677,7 @@
             .addImm(Imm / 4) // The tADDrSPi has an implied scale by four.
             .add(predOps(ARMCC::AL));
 
-    // Transfer MI flags.
-    MIB.setMIFlags(MI->getFlags());
-
-    LLVM_DEBUG(errs() << "Converted 32-bit: " << *MI
-                      << "       to 16-bit: " << *MIB);
-
-    MBB.erase_instr(MI);
-    ++NumNarrows;
+    PerformReduce(MBB, MI, MIB, NumNarrows);
     return true;
   }
 
@@ -846,14 +850,7 @@
     MIB.add(MI->getOperand(i));
   }
 
-  // Transfer MI flags.
-  MIB.setMIFlags(MI->getFlags());
-
-  LLVM_DEBUG(errs() << "Converted 32-bit: " << *MI
-                    << "       to 16-bit: " << *MIB);
-
-  MBB.erase_instr(MI);
-  ++Num2Addrs;
+  PerformReduce(MBB, MI, MIB, Num2Addrs);
   return true;
 }
 
@@ -969,14 +966,7 @@
   if (!MCID.isPredicable() && NewMCID.isPredicable())
     MIB.add(predOps(ARMCC::AL));
 
-  // Transfer MI flags.
-  MIB.setMIFlags(MI->getFlags());
-
-  LLVM_DEBUG(errs() << "Converted 32-bit: " << *MI
-                    << "       to 16-bit: " << *MIB);
-
-  MBB.erase_instr(MI);
-  ++NumNarrows;
+  PerformReduce(MBB, MI, MIB, NumNarrows);
   return true;
 }
 


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