[PATCH] D127043: [X86][AMX] Fill the shape information with virtual register.

[LuoYuanke via Phabricator via llvm-commits]

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When fill the shape information of tile configure, we need to know
the tile physical register. If the shape (row, column) is allocated with
physical register, the physical register may be re-defined before
writing it to stack. The re-def may happen during split or spill
registers. If the shape is in virtual register, there is no such
problem. In below example, the value 2 of %al is filled to config
register. The actual value should be 8.
%al = 8
mov %al, %bl          ; register split
%al = 2
store stack.cfg, %al  ; config
ldtilecfg
...
%t = tilezero %al,...
With virtual register, there is no such issue.
%row = 8
store stack.cfg, %row ; config
ldtilecfg
...
%t = tilezero %row,...


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D127043

Files:
  llvm/include/llvm/CodeGen/TargetPassConfig.h
  llvm/lib/CodeGen/TargetPassConfig.cpp
  llvm/lib/Target/X86/X86FastTileConfig.cpp
  llvm/lib/Target/X86/X86TargetMachine.cpp
  llvm/test/CodeGen/X86/AMX/amx-across-func.ll
  llvm/test/CodeGen/X86/AMX/amx-configO0toO0.ll
  llvm/test/CodeGen/X86/AMX/amx-configO2toO0.ll
  llvm/test/CodeGen/X86/AMX/amx-zero-config.ll
  llvm/test/CodeGen/X86/O0-pipeline.ll

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