[llvm] 24e16e4 - [SSAUpdaterImpl] Do not generate phi node with all the same incoming values
Serguei Katkov via llvm-commits
llvm-commits at lists.llvm.org
Thu Jun 2 22:24:57 PDT 2022
Author: Serguei Katkov
Date: 2022-06-03T12:24:33+07:00
New Revision: 24e16e4af20858e0c276d3cf4137b7a57afd2d19
URL: https://github.com/llvm/llvm-project/commit/24e16e4af20858e0c276d3cf4137b7a57afd2d19
DIFF: https://github.com/llvm/llvm-project/commit/24e16e4af20858e0c276d3cf4137b7a57afd2d19.diff
LOG: [SSAUpdaterImpl] Do not generate phi node with all the same incoming values
If all available vals to basic block are the same - do not build new phi node and
just use this value.
Reviewed By: sameerds
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D126525
Added:
Modified:
llvm/include/llvm/Transforms/Utils/SSAUpdaterImpl.h
llvm/test/CodeGen/AArch64/tail-dup-redundant-phi.mir
llvm/test/CodeGen/AMDGPU/nested-loop-conditions.ll
llvm/test/CodeGen/WebAssembly/lower-em-ehsjlj.ll
llvm/test/Transforms/LICM/sink-debuginfo-preserve.ll
Removed:
################################################################################
diff --git a/llvm/include/llvm/Transforms/Utils/SSAUpdaterImpl.h b/llvm/include/llvm/Transforms/Utils/SSAUpdaterImpl.h
index ee06893ca6602..a3e5ac3ac19d4 100644
--- a/llvm/include/llvm/Transforms/Utils/SSAUpdaterImpl.h
+++ b/llvm/include/llvm/Transforms/Utils/SSAUpdaterImpl.h
@@ -323,6 +323,28 @@ class SSAUpdaterImpl {
} while (Changed);
}
+ /// Check all predecessors and if all of them have the same AvailableVal use
+ /// it as value for block represented by Info. Return true if singluar value
+ /// is found.
+ bool FindSingularVal(BBInfo *Info) {
+ if (!Info->NumPreds)
+ return false;
+ ValT Singular = Info->Preds[0]->DefBB->AvailableVal;
+ if (!Singular)
+ return false;
+ for (unsigned Idx = 1; Idx < Info->NumPreds; ++Idx) {
+ ValT PredVal = Info->Preds[Idx]->DefBB->AvailableVal;
+ if (!PredVal || Singular != PredVal)
+ return false;
+ }
+ // Record Singular value.
+ (*AvailableVals)[Info->BB] = Singular;
+ assert(BBMap[Info->BB] == Info && "Info missed in BBMap?");
+ Info->AvailableVal = Singular;
+ Info->DefBB = Info->Preds[0]->DefBB;
+ return true;
+ }
+
/// FindAvailableVal - If this block requires a PHI, first check if an
/// existing PHI matches the PHI placement and reaching definitions computed
/// earlier, and if not, create a new PHI. Visit all the block's
@@ -339,6 +361,10 @@ class SSAUpdaterImpl {
if (Info->DefBB != Info)
continue;
+ // Look for singular value.
+ if (FindSingularVal(Info))
+ continue;
+
// Look for an existing PHI.
FindExistingPHI(Info->BB, BlockList);
if (Info->AvailableVal)
diff --git a/llvm/test/CodeGen/AArch64/tail-dup-redundant-phi.mir b/llvm/test/CodeGen/AArch64/tail-dup-redundant-phi.mir
index 80e78f17929c9..eb620b9743cb3 100644
--- a/llvm/test/CodeGen/AArch64/tail-dup-redundant-phi.mir
+++ b/llvm/test/CodeGen/AArch64/tail-dup-redundant-phi.mir
@@ -338,20 +338,18 @@ body: |
; CHECK-NEXT: bb.17.bb49:
; CHECK-NEXT: successors:{{ $}}
; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: [[PHI2:%[0-9]+]]:gpr64 = PHI [[PHI]], %bb.14, [[PHI]], %bb.15
- ; CHECK-NEXT: [[PHI3:%[0-9]+]]:gpr64all = PHI [[PHI1]], %bb.14, [[PHI1]], %bb.15
; CHECK-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit $sp
; CHECK-NEXT: [[MOVi32imm5:%[0-9]+]]:gpr32 = MOVi32imm 10
; CHECK-NEXT: $w0 = COPY [[MOVi32imm5]]
- ; CHECK-NEXT: [[STATEPOINT2:%[0-9]+]]:gpr64all, [[STATEPOINT3:%[0-9]+]]:gpr64all = STATEPOINT 2882400000, 0, 1, @wombat, $w0, 2, 0, 2, 0, 2, 3, [[PHI3]], [[PHI2]], [[PHI]], 2, 2, [[PHI1]](tied-def 0), [[PHI]](tied-def 1), 2, 0, 2, 2, 0, 0, 1, 1, csr_aarch64_aapcs, implicit-def $sp, implicit-def dead early-clobber $lr
+ ; CHECK-NEXT: [[STATEPOINT2:%[0-9]+]]:gpr64all, [[STATEPOINT3:%[0-9]+]]:gpr64all = STATEPOINT 2882400000, 0, 1, @wombat, $w0, 2, 0, 2, 0, 2, 3, [[PHI1]], [[PHI]], [[PHI]], 2, 2, [[PHI1]](tied-def 0), [[PHI]](tied-def 1), 2, 0, 2, 2, 0, 0, 1, 1, csr_aarch64_aapcs, implicit-def $sp, implicit-def dead early-clobber $lr
; CHECK-NEXT: ADJCALLSTACKUP 0, 0, implicit-def dead $sp, implicit $sp
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: bb.18.bb51:
- ; CHECK-NEXT: [[PHI4:%[0-9]+]]:gpr64all = PHI [[COPY10]], %bb.8, [[COPY13]], %bb.9
+ ; CHECK-NEXT: [[PHI2:%[0-9]+]]:gpr64all = PHI [[COPY10]], %bb.8, [[COPY13]], %bb.9
; CHECK-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit $sp
; CHECK-NEXT: [[MOVi32imm6:%[0-9]+]]:gpr32 = MOVi32imm 24
; CHECK-NEXT: $w0 = COPY [[MOVi32imm6]]
- ; CHECK-NEXT: [[STATEPOINT4:%[0-9]+]]:gpr64all = STATEPOINT 2882400000, 0, 1, @wombat, $w0, 2, 0, 2, 0, 2, 1, [[PHI4]], 2, 1, [[PHI4]](tied-def 0), 2, 0, 2, 1, 0, 0, csr_aarch64_aapcs, implicit-def $sp, implicit-def dead early-clobber $lr
+ ; CHECK-NEXT: [[STATEPOINT4:%[0-9]+]]:gpr64all = STATEPOINT 2882400000, 0, 1, @wombat, $w0, 2, 0, 2, 0, 2, 1, [[PHI2]], 2, 1, [[PHI2]](tied-def 0), 2, 0, 2, 1, 0, 0, csr_aarch64_aapcs, implicit-def $sp, implicit-def dead early-clobber $lr
; CHECK-NEXT: ADJCALLSTACKUP 0, 0, implicit-def dead $sp, implicit $sp
bb.0.bb:
successors: %bb.2(0x2aaaaaab), %bb.15(0x55555555)
diff --git a/llvm/test/CodeGen/AMDGPU/nested-loop-conditions.ll b/llvm/test/CodeGen/AMDGPU/nested-loop-conditions.ll
index 7113e33cfd5be..f3089e79ad378 100644
--- a/llvm/test/CodeGen/AMDGPU/nested-loop-conditions.ll
+++ b/llvm/test/CodeGen/AMDGPU/nested-loop-conditions.ll
@@ -14,25 +14,25 @@ define amdgpu_kernel void @reduced_nested_loop_conditions(i64 addrspace(3)* noca
; GCN-NEXT: s_load_dword s0, s[0:1], 0x9
; GCN-NEXT: v_lshlrev_b32_e32 v0, 3, v0
; GCN-NEXT: s_mov_b32 m0, -1
-; GCN-NEXT: s_mov_b64 s[2:3], -1
+; GCN-NEXT: s_and_b64 s[2:3], exec, -1
; GCN-NEXT: s_waitcnt lgkmcnt(0)
; GCN-NEXT: v_add_i32_e32 v0, vcc, s0, v0
; GCN-NEXT: ds_read_b64 v[0:1], v0
-; GCN-NEXT: s_and_b64 s[0:1], exec, -1
+; GCN-NEXT: s_and_b64 s[0:1], exec, 0
; GCN-NEXT: s_branch .LBB0_2
-; GCN-NEXT: .LBB0_1: ; %bb10
+; GCN-NEXT: .LBB0_1: ; %Flow
; GCN-NEXT: ; in Loop: Header=BB0_2 Depth=1
-; GCN-NEXT: s_mov_b64 s[4:5], 0
-; GCN-NEXT: s_andn2_b64 vcc, exec, s[2:3]
+; GCN-NEXT: s_mov_b64 vcc, s[0:1]
; GCN-NEXT: s_cbranch_vccz .LBB0_4
; GCN-NEXT: .LBB0_2: ; %bb5
; GCN-NEXT: ; =>This Inner Loop Header: Depth=1
-; GCN-NEXT: s_mov_b64 vcc, s[0:1]
-; GCN-NEXT: s_cbranch_vccnz .LBB0_1
-; GCN-NEXT: ; %bb.3: ; in Loop: Header=BB0_2 Depth=1
; GCN-NEXT: s_mov_b64 s[4:5], -1
-; GCN-NEXT: s_andn2_b64 vcc, exec, s[2:3]
-; GCN-NEXT: s_cbranch_vccnz .LBB0_2
+; GCN-NEXT: s_mov_b64 vcc, s[2:3]
+; GCN-NEXT: s_cbranch_vccz .LBB0_1
+; GCN-NEXT: ; %bb.3: ; %bb10
+; GCN-NEXT: ; in Loop: Header=BB0_2 Depth=1
+; GCN-NEXT: s_mov_b64 s[4:5], 0
+; GCN-NEXT: s_branch .LBB0_1
; GCN-NEXT: .LBB0_4: ; %loop.exit.guard
; GCN-NEXT: s_and_b64 vcc, exec, s[4:5]
; GCN-NEXT: s_cbranch_vccz .LBB0_7
diff --git a/llvm/test/CodeGen/WebAssembly/lower-em-ehsjlj.ll b/llvm/test/CodeGen/WebAssembly/lower-em-ehsjlj.ll
index e529468ad6fad..498f9305bacee 100644
--- a/llvm/test/CodeGen/WebAssembly/lower-em-ehsjlj.ll
+++ b/llvm/test/CodeGen/WebAssembly/lower-em-ehsjlj.ll
@@ -213,7 +213,6 @@ return: ; preds = %entry, %if.end
ret void
; CHECK: rethrow.exn:
-; CHECK-NEXT: %setjmpTable{{.*}} = phi i32* [ %setjmpTable{{.*}}, %if.end.split ], [ %setjmpTable{{.*}}, %if.end ]
; CHECK-NEXT: %exn = call i8* @__cxa_find_matching_catch_2()
; CHECK-NEXT: %{{.*}} = bitcast i32* %setjmpTable{{.*}} to i8*
; CHECK-NEXT: tail call void @free(i8* %{{.*}})
diff --git a/llvm/test/Transforms/LICM/sink-debuginfo-preserve.ll b/llvm/test/Transforms/LICM/sink-debuginfo-preserve.ll
index 3deee82d108d3..ea28ab4aefcc8 100644
--- a/llvm/test/Transforms/LICM/sink-debuginfo-preserve.ll
+++ b/llvm/test/Transforms/LICM/sink-debuginfo-preserve.ll
@@ -16,8 +16,8 @@
; }
; }
-; CHECK: %.lcssa = phi i32
-; CHECK-NEXT: store i32 %.lcssa, i32* getelementptr inbounds ([2 x i32], [2 x i32]* @g_390, i64 0, i64 1), align 4, !dbg [[storeLocation:![0-9]+]]
+; CHECK: bb22:
+; CHECK-NEXT: store i32 0, i32* getelementptr inbounds ([2 x i32], [2 x i32]* @g_390, i64 0, i64 1), align 4, !dbg [[storeLocation:![0-9]+]]
; CHECK: [[storeLocation]] = !DILocation(line: 0
target datalayout = "e-m:o-p270:32:32-p271:32:32-p272:64:64-i64:64-f80:128-n8:16:32:64-S128"
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