[llvm] 76ac916 - [RISCV] Inline one copy of needVSETVLI into the other [NFC]
Philip Reames via llvm-commits
llvm-commits at lists.llvm.org
Thu Jun 2 13:06:24 PDT 2022
Author: Philip Reames
Date: 2022-06-02T13:06:18-07:00
New Revision: 76ac916d634436102c86da6cb89584b675984407
URL: https://github.com/llvm/llvm-project/commit/76ac916d634436102c86da6cb89584b675984407
DIFF: https://github.com/llvm/llvm-project/commit/76ac916d634436102c86da6cb89584b675984407.diff
LOG: [RISCV] Inline one copy of needVSETVLI into the other [NFC]
Calling the non-MI version directly was unsound (as fixed in dcdb0bf2), so remove that version to decrease likelyhood of future mistakes.
Added:
Modified:
llvm/lib/Target/RISCV/RISCVInsertVSETVLI.cpp
Removed:
################################################################################
diff --git a/llvm/lib/Target/RISCV/RISCVInsertVSETVLI.cpp b/llvm/lib/Target/RISCV/RISCVInsertVSETVLI.cpp
index 30659797531c6..b656c9462fd07 100644
--- a/llvm/lib/Target/RISCV/RISCVInsertVSETVLI.cpp
+++ b/llvm/lib/Target/RISCV/RISCVInsertVSETVLI.cpp
@@ -453,8 +453,6 @@ class RISCVInsertVSETVLI : public MachineFunctionPass {
StringRef getPassName() const override { return RISCV_INSERT_VSETVLI_NAME; }
private:
- bool needVSETVLI(const VSETVLIInfo &Require,
- const VSETVLIInfo &CurInfo) const;
bool needVSETVLI(const MachineInstr &MI, const VSETVLIInfo &Require,
const VSETVLIInfo &CurInfo) const;
bool needVSETVLIPHI(const VSETVLIInfo &Require,
@@ -718,30 +716,6 @@ static VSETVLIInfo getInfoForVSETVLI(const MachineInstr &MI) {
return NewInfo;
}
-bool RISCVInsertVSETVLI::needVSETVLI(const VSETVLIInfo &Require,
- const VSETVLIInfo &CurInfo) const {
- if (CurInfo.isCompatible(Require))
- return false;
-
- // We didn't find a compatible value. If our AVL is a virtual register,
- // it might be defined by a VSET(I)VLI. If it has the same VLMAX we need
- // and the last VL/VTYPE we observed is the same, we don't need a
- // VSETVLI here.
- if (!CurInfo.isUnknown() && Require.hasAVLReg() &&
- Require.getAVLReg().isVirtual() && !CurInfo.hasSEWLMULRatioOnly() &&
- CurInfo.hasCompatibleVTYPE(Require)) {
- if (MachineInstr *DefMI = MRI->getVRegDef(Require.getAVLReg())) {
- if (isVectorConfigInstr(*DefMI)) {
- VSETVLIInfo DefInfo = getInfoForVSETVLI(*DefMI);
- if (DefInfo.hasSameAVL(CurInfo) && DefInfo.hasSameVLMAX(CurInfo))
- return false;
- }
- }
- }
-
- return true;
-}
-
bool canSkipVSETVLIForLoadStore(const MachineInstr &MI,
const VSETVLIInfo &Require,
const VSETVLIInfo &CurInfo) {
@@ -940,8 +914,25 @@ bool canSkipVSETVLIForLoadStore(const MachineInstr &MI,
bool RISCVInsertVSETVLI::needVSETVLI(const MachineInstr &MI, const VSETVLIInfo &Require,
const VSETVLIInfo &CurInfo) const {
- if (!needVSETVLI(Require, CurInfo))
+ if (CurInfo.isCompatible(Require))
return false;
+
+ // We didn't find a compatible value. If our AVL is a virtual register,
+ // it might be defined by a VSET(I)VLI. If it has the same VLMAX we need
+ // and the last VL/VTYPE we observed is the same, we don't need a
+ // VSETVLI here.
+ if (!CurInfo.isUnknown() && Require.hasAVLReg() &&
+ Require.getAVLReg().isVirtual() && !CurInfo.hasSEWLMULRatioOnly() &&
+ CurInfo.hasCompatibleVTYPE(Require)) {
+ if (MachineInstr *DefMI = MRI->getVRegDef(Require.getAVLReg())) {
+ if (isVectorConfigInstr(*DefMI)) {
+ VSETVLIInfo DefInfo = getInfoForVSETVLI(*DefMI);
+ if (DefInfo.hasSameAVL(CurInfo) && DefInfo.hasSameVLMAX(CurInfo))
+ return false;
+ }
+ }
+ }
+
// If this is a unit-stride or strided load/store, we may be able to use the
// EMUL=(EEW/SEW)*LMUL relationship to avoid changing VTYPE.
return !canSkipVSETVLIForLoadStore(MI, Require, CurInfo);
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