[PATCH] D126896: [DAGCombiner][RISCV] Improve computeKnownBits for (smax X, C) where C is non-negative.
Philip Reames via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Thu Jun 2 11:59:27 PDT 2022
reames accepted this revision.
reames added a comment.
This revision is now accepted and ready to land.
LGTM
Seems like maybe something we should generalize for the inverse smin with negative value case and sink into known bits, but that's an entirely optional follow on.
Repository:
rG LLVM Github Monorepo
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https://reviews.llvm.org/D126896/new/
https://reviews.llvm.org/D126896
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