[PATCH] D125962: [RISCV] Add a test showing overlapping stack offsets with RVV

Yueh-Ting (eop) Chen via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Wed Jun 1 20:34:50 PDT 2022


eopXD added a comment.

In D125962#3549448 <https://reviews.llvm.org/D125962#3549448>, @frasercrmck wrote:

> In D125962#3535942 <https://reviews.llvm.org/D125962#3535942>, @eopXD wrote:
>
>> So after the machine copy propagation, the code looks like the following.
>> s9/$x25 contains value (so we need to callee-save it) and a0/$x10 is a spill-slot object (so we need to callee save it too along with $v30) as well, right?
>>
>>   $x25 = COPY $x10
>>   SW renamable $x10, %stack.0, 0 :: (store (s32) into %stack.0)
>>   PseudoVSPILL_M2 renamable $v30m2, %stack.1 :: (store unknown-size into %stack.1, align 8)
>>   PseudoRET
>
> Yes, we callee-save `s9/$x25` because we're clobbering it in the test. That spill (`sw s9, 52(sp)`) is automatically generated by the frame lowering code.
>
> But no, I wouldn't say we're "callee-saving" `a0/$x10` or `$v30`. Personally I think of the term "callee-saving" as describing the process of saving registers for the purposes of the calling convention. But in this test we're only storing `a0/$x10` and `$v30` to the stack because we've concocted a test with those stores in it. We're just demonstrating some codegen in an arbitrary fashion. The stores/spills are unnecessary from a calling convention point of view, but LLVM isn't going to (or able to) remove such unnecessary stack spills - at least at this stage of the pipeline.
>
> I think maybe the `type: spill-slot` is possibly leading to some confusion? Sorry about that - I just copy/pasted from other tests. I think `type: default` would be more accurate.
>
> I hope that helps and I'm not confusing you further :)

I see. Thank you very much for the explanation!


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