[PATCH] D126766: [AMDGPU][GFX9][GFX10] Support base+soffset+offset s_dcache_discard's.

[Dmitry Preobrazhensky via Phabricator via llvm-commits]

dp accepted this revision.
dp added a comment.
This revision is now accepted and ready to land.

LGTM.



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Comment at: llvm/lib/Target/AMDGPU/SMInstructions.td:215
+    opName, "_SGPR_IMM", (ins SReg_32:$soffset, smem_offset_mod:$offset),
+    "$soffset$offset", /* hasOffset= */ 1, /* hasSOffset= */ 1>;
 }
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For my taste, these comments do not improve code readability (especially being repeated 3 times).
Also I think we should not dogmatically follow 80 columns rule in td files. 
The following variant looks better for me despite being a bit wider than recommended:

  def _SGPR_IMM : SM_Discard_Pseudo <opName, 
    "_SGPR_IMM", (ins SReg_32:$soffset, smem_offset_mod:$offset), "$soffset$offset", 1, 1>;



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  https://reviews.llvm.org/D126766/new/

https://reviews.llvm.org/D126766