[PATCH] D125997: [AMDGPU] Instruction Type Pipeline

[Matt Arsenault via Phabricator via llvm-commits]

arsenm added inline comments.


================
Comment at: llvm/lib/Target/AMDGPU/AMDGPUMFMAIGroupLP.cpp:25
+
+#define DEBUG_TYPE "amdgpu-MFMA-IGroupLP"
+
----------------
This is a bad name for this. DEBUG_TYPE pass names should be all lowercase for consistency. I'm also not a fan of not-a-pass debug prefixes. Can this use misched or whatever the actual scheduler's DEBUG_TYPE is?


================
Comment at: llvm/lib/Target/AMDGPU/AMDGPUMFMAIGroupLP.cpp:171-172
+  const IsInstructionType isVMEMReadFn = [this](const MachineInstr &MI) {
+    if (((TII->isFLAT(MI) && !TII->isDS(MI)) || TII->isVMEM(MI)) &&
+        MI.mayLoad()) {
+      LLVM_DEBUG(dbgs() << "Found VMEM read\n";);
----------------
Check mayLoad first?


================
Comment at: llvm/lib/Target/AMDGPU/AMDGPUMFMAIGroupLP.cpp:181
+  const IsInstructionType isDSWriteFn = [this](const MachineInstr &MI) {
+    if (TII->isDS(MI) && MI.mayStore()) {
+      LLVM_DEBUG(dbgs() << "Found DS Write\n";);
----------------
Check mayStore first?


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D125997/new/

https://reviews.llvm.org/D125997