[llvm] af0113c - [X86] combineEXTRACT_SUBVECTOR - pull out repeated getVectorNumElements() calls. NFC.
Simon Pilgrim via llvm-commits
llvm-commits at lists.llvm.org
Tue May 31 08:14:03 PDT 2022
Author: Simon Pilgrim
Date: 2022-05-31T16:13:54+01:00
New Revision: af0113cf77b3df93495182507cb41e54927188c7
URL: https://github.com/llvm/llvm-project/commit/af0113cf77b3df93495182507cb41e54927188c7
DIFF: https://github.com/llvm/llvm-project/commit/af0113cf77b3df93495182507cb41e54927188c7.diff
LOG: [X86] combineEXTRACT_SUBVECTOR - pull out repeated getVectorNumElements() calls. NFC.
Added:
Modified:
llvm/lib/Target/X86/X86ISelLowering.cpp
Removed:
################################################################################
diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp
index fda8a22c1991..d24ffeea775e 100644
--- a/llvm/lib/Target/X86/X86ISelLowering.cpp
+++ b/llvm/lib/Target/X86/X86ISelLowering.cpp
@@ -53796,6 +53796,7 @@ static SDValue combineEXTRACT_SUBVECTOR(SDNode *N, SelectionDAG &DAG,
EVT InVecVT = InVec.getValueType();
unsigned SizeInBits = VT.getSizeInBits();
unsigned InSizeInBits = InVecVT.getSizeInBits();
+ unsigned NumSubElts = VT.getVectorNumElements();
const TargetLowering &TLI = DAG.getTargetLoweringInfo();
if (Subtarget.hasAVX() && !Subtarget.hasAVX2() &&
@@ -53833,9 +53834,8 @@ static SDValue combineEXTRACT_SUBVECTOR(SDNode *N, SelectionDAG &DAG,
}
if (InVec.getOpcode() == ISD::BUILD_VECTOR)
- return DAG.getBuildVector(
- VT, SDLoc(N),
- InVec.getNode()->ops().slice(IdxVal, VT.getVectorNumElements()));
+ return DAG.getBuildVector(VT, SDLoc(N),
+ InVec->ops().slice(IdxVal, NumSubElts));
// If we are extracting from an insert into a larger vector, replace with a
// smaller insert if we don't access less than the original subvector. Don't
@@ -53868,8 +53868,7 @@ static SDValue combineEXTRACT_SUBVECTOR(SDNode *N, SelectionDAG &DAG,
return extractSubVector(InVec, 0, DAG, SDLoc(N), SizeInBits);
// Attempt to extract from the source of a shuffle vector.
- if ((InSizeInBits % SizeInBits) == 0 &&
- (IdxVal % VT.getVectorNumElements()) == 0) {
+ if ((InSizeInBits % SizeInBits) == 0 && (IdxVal % NumSubElts) == 0) {
SmallVector<int, 32> ShuffleMask;
SmallVector<int, 32> ScaledMask;
SmallVector<SDValue, 2> ShuffleInputs;
@@ -53877,7 +53876,7 @@ static SDValue combineEXTRACT_SUBVECTOR(SDNode *N, SelectionDAG &DAG,
// Decode the shuffle mask and scale it so its shuffling subvectors.
if (getTargetShuffleInputs(InVecBC, ShuffleInputs, ShuffleMask, DAG) &&
scaleShuffleElements(ShuffleMask, NumSubVecs, ScaledMask)) {
- unsigned SubVecIdx = IdxVal / VT.getVectorNumElements();
+ unsigned SubVecIdx = IdxVal / NumSubElts;
if (ScaledMask[SubVecIdx] == SM_SentinelUndef)
return DAG.getUNDEF(VT);
if (ScaledMask[SubVecIdx] == SM_SentinelZero)
@@ -53885,7 +53884,7 @@ static SDValue combineEXTRACT_SUBVECTOR(SDNode *N, SelectionDAG &DAG,
SDValue Src = ShuffleInputs[ScaledMask[SubVecIdx] / NumSubVecs];
if (Src.getValueSizeInBits() == InSizeInBits) {
unsigned SrcSubVecIdx = ScaledMask[SubVecIdx] % NumSubVecs;
- unsigned SrcEltIdx = SrcSubVecIdx * VT.getVectorNumElements();
+ unsigned SrcEltIdx = SrcSubVecIdx * NumSubElts;
return extractSubVector(DAG.getBitcast(InVecVT, Src), SrcEltIdx, DAG,
SDLoc(N), SizeInBits);
}
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