[llvm] 4fb3fd7 - [InstCombine] Fix const folding of switches with default case

[Danila Malyutin via llvm-commits]

Author: Danila Malyutin
Date: 2022-05-31T15:13:58+03:00
New Revision: 4fb3fd7d82067a6d5ade618db54b6e9b1158204b

URL: https://github.com/llvm/llvm-project/commit/4fb3fd7d82067a6d5ade618db54b6e9b1158204b
DIFF: https://github.com/llvm/llvm-project/commit/4fb3fd7d82067a6d5ade618db54b6e9b1158204b.diff

LOG: [InstCombine] Fix const folding of switches with default case

In case phi was in the default block it could lead to multi-edge.
Fixes #55721.

Differential Revision: https://reviews.llvm.org/D126650

Added: 
    

Modified: 
    llvm/lib/Transforms/InstCombine/InstCombinePHI.cpp
    llvm/test/Transforms/InstCombine/simple_phi_condition.ll

Removed: 
    


################################################################################
diff  --git a/llvm/lib/Transforms/InstCombine/InstCombinePHI.cpp b/llvm/lib/Transforms/InstCombine/InstCombinePHI.cpp
index 85363d0f6c9ae..8b6831152131d 100644
--- a/llvm/lib/Transforms/InstCombine/InstCombinePHI.cpp
+++ b/llvm/lib/Transforms/InstCombine/InstCombinePHI.cpp
@@ -1269,6 +1269,12 @@ static Value *simplifyUsingControlFlow(InstCombiner &Self, PHINode &PN,
   //      ...      ...
   //       \       /
   //    phi [true] [false]
+  // and
+  //        switch (cond)
+  // case v1: /       \ case v2:
+  //         ...      ...
+  //          \       /
+  //       phi [v1] [v2]
   // Make sure all inputs are constants.
   if (!all_of(PN.operands(), [](Value *V) { return isa<ConstantInt>(V); }))
     return nullptr;
@@ -1297,6 +1303,7 @@ static Value *simplifyUsingControlFlow(InstCombiner &Self, PHINode &PN,
     AddSucc(ConstantInt::getFalse(Context), BI->getSuccessor(1));
   } else if (auto *SI = dyn_cast<SwitchInst>(IDom->getTerminator())) {
     Cond = SI->getCondition();
+    ++SuccCount[SI->getDefaultDest()];
     for (auto Case : SI->cases())
       AddSucc(Case.getCaseValue(), Case.getCaseSuccessor());
   } else {

diff  --git a/llvm/test/Transforms/InstCombine/simple_phi_condition.ll b/llvm/test/Transforms/InstCombine/simple_phi_condition.ll
index 154d58746650d..51b5e16627fc3 100644
--- a/llvm/test/Transforms/InstCombine/simple_phi_condition.ll
+++ b/llvm/test/Transforms/InstCombine/simple_phi_condition.ll
@@ -585,3 +585,69 @@ merge:
   %ret = phi i8 [ 1, %sw.1 ], [ 7, %sw.7 ], [ 19, %sw.19 ], [ 42, %entry ]
   ret i8 %ret
 }
+
+define i8 @test_switch_default_edge_direct(i8 %cond) {
+; CHECK-LABEL: @test_switch_default_edge_direct(
+; CHECK-NEXT:  entry:
+; CHECK-NEXT:    switch i8 [[COND:%.*]], label [[MERGE:%.*]] [
+; CHECK-NEXT:    i8 1, label [[SW_1:%.*]]
+; CHECK-NEXT:    i8 7, label [[SW_7:%.*]]
+; CHECK-NEXT:    i8 19, label [[MERGE]]
+; CHECK-NEXT:    ]
+; CHECK:       sw.1:
+; CHECK-NEXT:    br label [[MERGE]]
+; CHECK:       sw.7:
+; CHECK-NEXT:    br label [[MERGE]]
+; CHECK:       merge:
+; CHECK-NEXT:    [[RET:%.*]] = phi i8 [ 1, [[SW_1]] ], [ 7, [[SW_7]] ], [ 19, [[ENTRY:%.*]] ], [ 19, [[ENTRY]] ]
+; CHECK-NEXT:    ret i8 [[RET]]
+;
+entry:
+  switch i8 %cond, label %merge [
+  i8 1, label %sw.1
+  i8 7, label %sw.7
+  i8 19, label %merge
+  ]
+sw.1:
+  br label %merge
+sw.7:
+  br label %merge
+merge:
+  %ret = phi i8 [ 1, %sw.1 ], [ 7, %sw.7 ], [ 19, %entry ], [ 19, %entry ]
+  ret i8 %ret
+}
+
+define i8 @test_switch_default_edge_duplicate(i8 %cond) {
+; CHECK-LABEL: @test_switch_default_edge_duplicate(
+; CHECK-NEXT:  entry:
+; CHECK-NEXT:    switch i8 [[COND:%.*]], label [[SW_19:%.*]] [
+; CHECK-NEXT:    i8 1, label [[SW_1:%.*]]
+; CHECK-NEXT:    i8 7, label [[SW_7:%.*]]
+; CHECK-NEXT:    i8 19, label [[SW_19]]
+; CHECK-NEXT:    ]
+; CHECK:       sw.1:
+; CHECK-NEXT:    br label [[MERGE:%.*]]
+; CHECK:       sw.7:
+; CHECK-NEXT:    br label [[MERGE]]
+; CHECK:       sw.19:
+; CHECK-NEXT:    br label [[MERGE]]
+; CHECK:       merge:
+; CHECK-NEXT:    [[RET:%.*]] = phi i8 [ 1, [[SW_1]] ], [ 7, [[SW_7]] ], [ 19, [[SW_19]] ]
+; CHECK-NEXT:    ret i8 [[RET]]
+;
+entry:
+  switch i8 %cond, label %sw.19 [
+  i8 1, label %sw.1
+  i8 7, label %sw.7
+  i8 19, label %sw.19
+  ]
+sw.1:
+  br label %merge
+sw.7:
+  br label %merge
+sw.19:
+  br label %merge
+merge:
+  %ret = phi i8 [ 1, %sw.1 ], [ 7, %sw.7 ], [ 19, %sw.19 ]
+  ret i8 %ret
+}