[llvm] 5a2e640 - [RISCV][NFC] Adjust some comments in RISCVInsertVSETVLI

[Fraser Cormack via llvm-commits]

Author: Fraser Cormack
Date: 2022-05-31T10:13:15+01:00
New Revision: 5a2e640eb794fffeba6afa259058115d62e7b32e

URL: https://github.com/llvm/llvm-project/commit/5a2e640eb794fffeba6afa259058115d62e7b32e
DIFF: https://github.com/llvm/llvm-project/commit/5a2e640eb794fffeba6afa259058115d62e7b32e.diff

LOG: [RISCV][NFC] Adjust some comments in RISCVInsertVSETVLI

Capitalize the first letter of comments like the others, and a few other
tweaks.

Added: 
    

Modified: 
    llvm/lib/Target/RISCV/RISCVInsertVSETVLI.cpp

Removed: 
    


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diff  --git a/llvm/lib/Target/RISCV/RISCVInsertVSETVLI.cpp b/llvm/lib/Target/RISCV/RISCVInsertVSETVLI.cpp
index 5a0b242dc889a..f3a22852c7422 100644
--- a/llvm/lib/Target/RISCV/RISCVInsertVSETVLI.cpp
+++ b/llvm/lib/Target/RISCV/RISCVInsertVSETVLI.cpp
@@ -1040,7 +1040,7 @@ void RISCVInsertVSETVLI::computeIncomingVLVTYPE(const MachineBasicBlock &MBB) {
 }
 
 // If we weren't able to prove a vsetvli was directly unneeded, it might still
-// be/ unneeded if the AVL is a phi node where all incoming values are VL
+// be unneeded if the AVL is a phi node where all incoming values are VL
 // outputs from the last VSETVLI in their respective basic blocks.
 bool RISCVInsertVSETVLI::needVSETVLIPHI(const VSETVLIInfo &Require,
                                         const MachineBasicBlock &MBB) const {
@@ -1286,8 +1286,8 @@ void RISCVInsertVSETVLI::doLocalPrepass(MachineBasicBlock &MBB) {
 static bool hasFixedResult(const VSETVLIInfo &Info, const RISCVSubtarget &ST) {
   if (!Info.hasAVLImm())
     // VLMAX is always the same value.
-    // TODO: Could extend to other registers by looking at the associated
-    // vreg def placement.
+    // TODO: Could extend to other registers by looking at the associated vreg
+    // def placement.
     return RISCV::X0 == Info.getAVLReg();
 
   unsigned AVL = Info.getAVLImm();
@@ -1330,12 +1330,12 @@ void RISCVInsertVSETVLI::doPRE(MachineBasicBlock &MBB) {
     }
   }
 
-  // unreachable, single pred, or full redundancy.  Note that FRE
-  // is handled by phase 3.
+  // Unreachable, single pred, or full redundancy. Note that FRE is handled by
+  // phase 3.
   if (!UnavailablePred || !AvailableInfo.isValid())
     return;
 
-  // critical edge - TODO: consider splitting?
+  // Critical edge - TODO: consider splitting?
   if (UnavailablePred->succ_size() != 1)
     return;