[llvm] 2cadf84 - [RISCV] Pass OptLevel to `RISCVDAGToDAGISel` correctly
via llvm-commits
llvm-commits at lists.llvm.org
Mon May 30 17:22:55 PDT 2022
Author: eopXD
Date: 2022-05-30T17:22:50-07:00
New Revision: 2cadf84fc817a6c89eca0556a078d7879091e2a5
URL: https://github.com/llvm/llvm-project/commit/2cadf84fc817a6c89eca0556a078d7879091e2a5
DIFF: https://github.com/llvm/llvm-project/commit/2cadf84fc817a6c89eca0556a078d7879091e2a5.diff
LOG: [RISCV] Pass OptLevel to `RISCVDAGToDAGISel` correctly
Originally, `OptLevel` isn't passed into the `MachineFunctionPass`.
This lets the default parameter of `SelectionDAGISel`, which is
`CodeGenOpt::Default`, be passed in. OptLevelChanger captures the
optimization level with the parameter, and rather not the value
within `TargetMachine`. This lets the optimization be
unintentionally overwriten if other value than `CodeGenOpt::Default`
passed.
This patch fixes this by passing the optimization level rather
than using the default value.
Reviewed By: craig.topper
Differential Revision: https://reviews.llvm.org/D126641
Added:
Modified:
llvm/lib/Target/RISCV/RISCV.h
llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
llvm/lib/Target/RISCV/RISCVISelDAGToDAG.h
llvm/lib/Target/RISCV/RISCVTargetMachine.cpp
llvm/test/CodeGen/RISCV/O0-pipeline.ll
llvm/test/CodeGen/RISCV/isel-optnone.ll
Removed:
################################################################################
diff --git a/llvm/lib/Target/RISCV/RISCV.h b/llvm/lib/Target/RISCV/RISCV.h
index 9a8b062387546..917837a307ada 100644
--- a/llvm/lib/Target/RISCV/RISCV.h
+++ b/llvm/lib/Target/RISCV/RISCV.h
@@ -35,7 +35,8 @@ bool lowerRISCVMachineInstrToMCInst(const MachineInstr *MI, MCInst &OutMI,
bool lowerRISCVMachineOperandToMCOperand(const MachineOperand &MO,
MCOperand &MCOp, const AsmPrinter &AP);
-FunctionPass *createRISCVISelDag(RISCVTargetMachine &TM);
+FunctionPass *createRISCVISelDag(RISCVTargetMachine &TM,
+ CodeGenOpt::Level OptLevel);
FunctionPass *createRISCVMakeCompressibleOptPass();
void initializeRISCVMakeCompressibleOptPass(PassRegistry &);
diff --git a/llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp b/llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
index 26f3614770c7a..af91cd59d9c72 100644
--- a/llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
+++ b/llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
@@ -2436,6 +2436,7 @@ bool RISCVDAGToDAGISel::doPeepholeMaskedRVV(SDNode *N) {
// This pass converts a legalized DAG into a RISCV-specific DAG, ready
// for instruction scheduling.
-FunctionPass *llvm::createRISCVISelDag(RISCVTargetMachine &TM) {
- return new RISCVDAGToDAGISel(TM);
+FunctionPass *llvm::createRISCVISelDag(RISCVTargetMachine &TM,
+ CodeGenOpt::Level OptLevel) {
+ return new RISCVDAGToDAGISel(TM, OptLevel);
}
diff --git a/llvm/lib/Target/RISCV/RISCVISelDAGToDAG.h b/llvm/lib/Target/RISCV/RISCVISelDAGToDAG.h
index 955dc4d609f28..8ddc5c32a3da2 100644
--- a/llvm/lib/Target/RISCV/RISCVISelDAGToDAG.h
+++ b/llvm/lib/Target/RISCV/RISCVISelDAGToDAG.h
@@ -24,8 +24,9 @@ class RISCVDAGToDAGISel : public SelectionDAGISel {
const RISCVSubtarget *Subtarget = nullptr;
public:
- explicit RISCVDAGToDAGISel(RISCVTargetMachine &TargetMachine)
- : SelectionDAGISel(TargetMachine) {}
+ explicit RISCVDAGToDAGISel(RISCVTargetMachine &TargetMachine,
+ CodeGenOpt::Level OptLevel)
+ : SelectionDAGISel(TargetMachine, OptLevel) {}
StringRef getPassName() const override {
return "RISCV DAG->DAG Pattern Instruction Selection";
diff --git a/llvm/lib/Target/RISCV/RISCVTargetMachine.cpp b/llvm/lib/Target/RISCV/RISCVTargetMachine.cpp
index e5bfe782d1131..0dc6445926a90 100644
--- a/llvm/lib/Target/RISCV/RISCVTargetMachine.cpp
+++ b/llvm/lib/Target/RISCV/RISCVTargetMachine.cpp
@@ -182,7 +182,7 @@ bool RISCVPassConfig::addPreISel() {
}
bool RISCVPassConfig::addInstSelector() {
- addPass(createRISCVISelDag(getRISCVTargetMachine()));
+ addPass(createRISCVISelDag(getRISCVTargetMachine(), getOptLevel()));
return false;
}
diff --git a/llvm/test/CodeGen/RISCV/O0-pipeline.ll b/llvm/test/CodeGen/RISCV/O0-pipeline.ll
index 94c775c809eca..bc77a8eea079b 100644
--- a/llvm/test/CodeGen/RISCV/O0-pipeline.ll
+++ b/llvm/test/CodeGen/RISCV/O0-pipeline.ll
@@ -35,13 +35,6 @@
; CHECK-NEXT: Safe Stack instrumentation pass
; CHECK-NEXT: Insert stack protectors
; CHECK-NEXT: Module Verifier
-; CHECK-NEXT: Basic Alias Analysis (stateless AA impl)
-; CHECK-NEXT: Function Alias Analysis Results
-; CHECK-NEXT: Natural Loop Information
-; CHECK-NEXT: Post-Dominator Tree Construction
-; CHECK-NEXT: Branch Probability Analysis
-; CHECK-NEXT: Lazy Branch Probability Analysis
-; CHECK-NEXT: Lazy Block Frequency Analysis
; CHECK-NEXT: RISCV DAG->DAG Pattern Instruction Selection
; CHECK-NEXT: Finalize ISel and expand pseudo-instructions
; CHECK-NEXT: Local Stack Slot Allocation
diff --git a/llvm/test/CodeGen/RISCV/isel-optnone.ll b/llvm/test/CodeGen/RISCV/isel-optnone.ll
index 28db6d73e04bd..53a4f2288267b 100644
--- a/llvm/test/CodeGen/RISCV/isel-optnone.ll
+++ b/llvm/test/CodeGen/RISCV/isel-optnone.ll
@@ -2,11 +2,9 @@
; RUN: llc < %s -O0 -mtriple=riscv64 -debug-only=isel 2>&1 | FileCheck %s
define i32* @fooOptnone(i32* %p, i32* %q, i32** %z) #0 {
-; CHECK: Changing optimization level for Function fooOptnone
-; CHECL: Before: -O2 ; After: -O0
+; CHECK-NOT: Changing optimization level for Function fooOptnone
+; CHECK-NOT: Restoring optimization level for Function fooOptnone
-; CHECK: Restoring optimization level for Function fooOptnone
-; CHECK: Before: -O0 ; After: -O2
entry:
%r = load i32, i32* %p
%s = load i32, i32* %q
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