[PATCH] D126617: [InstCombine] Optimize shift+lshr+and conversion pattern to simple comparison.

Sanjay Patel via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Mon May 30 12:55:47 PDT 2022


spatel added inline comments.


================
Comment at: llvm/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp:1916
+          // iff C,C1 is pow2 and Log2(C)+C2 < Log2(C1):
+          // ((C1 >> X) >> C2) & C -> X == (Log2(C1)-Log2(C)-C2) ? C : 0
+          unsigned CmpC = Log2C1 - LShrEqBits;
----------------
This pattern with 2 shifts in the same direction should not exist after:
a0c3c60728ee5bc7




================
Comment at: llvm/test/Transforms/InstCombine/and.ll:1705-1706
 ;
   %lshr1 = lshr i16 2048, %x
   %lshr2 = lshr i16 %lshr1, 6
   %r = and i16 %lshr2, 4
----------------
We had not reduced shifts as much as possible in this test and several others:




CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D126617/new/

https://reviews.llvm.org/D126617



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