[llvm] 3e6ba89 - [InstCombine] Fold a mul with bool value into and
via llvm-commits
llvm-commits at lists.llvm.org
Mon May 30 06:07:43 PDT 2022
Author: zhongyunde
Date: 2022-05-30T21:05:00+08:00
New Revision: 3e6ba89055c80e6360b7605464520711b30084a6
URL: https://github.com/llvm/llvm-project/commit/3e6ba89055c80e6360b7605464520711b30084a6
DIFF: https://github.com/llvm/llvm-project/commit/3e6ba89055c80e6360b7605464520711b30084a6.diff
LOG: [InstCombine] Fold a mul with bool value into and
Fixes https://github.com/llvm/llvm-project/issues/55599
X * Y --> X & Y, iff X, Y can be only {0, 1}.
https://alive2.llvm.org/ce/z/_RsTKF
Reviewed By: spatel, nikic
Differential Revision: https://reviews.llvm.org/D126040
Added:
Modified:
llvm/lib/Transforms/InstCombine/InstCombineMulDivRem.cpp
llvm/test/Transforms/InstCombine/mul-masked-bits.ll
Removed:
################################################################################
diff --git a/llvm/lib/Transforms/InstCombine/InstCombineMulDivRem.cpp b/llvm/lib/Transforms/InstCombine/InstCombineMulDivRem.cpp
index 897580a414876..da31d6260c88b 100644
--- a/llvm/lib/Transforms/InstCombine/InstCombineMulDivRem.cpp
+++ b/llvm/lib/Transforms/InstCombine/InstCombineMulDivRem.cpp
@@ -301,9 +301,15 @@ Instruction *InstCombinerImpl::visitMul(BinaryOperator &I) {
}
}
- // i1 mul -> i1 and.
+ // Fold the following two scenarios:
+ // 1) i1 mul -> i1 and.
+ // 2) X * Y --> X & Y, iff X, Y can be only {0,1}.
+ // Note: We could use known bits to generalize this and related patterns with
+ // shifts/truncs
Type *Ty = I.getType();
- if (Ty->isIntOrIntVectorTy(1))
+ if (Ty->isIntOrIntVectorTy(1) ||
+ (match(Op0, m_And(m_Value(), m_One())) &&
+ match(Op1, m_And(m_Value(), m_One()))))
return BinaryOperator::CreateAnd(Op0, Op1);
// X*(1 << Y) --> X << Y
diff --git a/llvm/test/Transforms/InstCombine/mul-masked-bits.ll b/llvm/test/Transforms/InstCombine/mul-masked-bits.ll
index 553788561f759..9b7caff982865 100644
--- a/llvm/test/Transforms/InstCombine/mul-masked-bits.ll
+++ b/llvm/test/Transforms/InstCombine/mul-masked-bits.ll
@@ -169,13 +169,31 @@ define i33 @squared_demanded_3_low_bits(i33 %x) {
; Scalar tests
define i64 @scalar_mul_bit_x0_y0(i64 %x, i64 %y) {
; CHECK-LABEL: @scalar_mul_bit_x0_y0(
+; CHECK-NEXT: [[AND2:%.*]] = and i64 [[Y:%.*]], 1
+; CHECK-NEXT: [[MUL:%.*]] = and i64 [[AND2]], [[X:%.*]]
+; CHECK-NEXT: ret i64 [[MUL]]
+;
+ %and1 = and i64 %x, 1
+ %and2 = and i64 %y, 1
+ %mul = mul i64 %and1, %and2
+ ret i64 %mul
+}
+
+declare void @use(i64)
+
+define i64 @scalar_mul_bit_x0_y0_uses(i64 %x, i64 %y) {
+; CHECK-LABEL: @scalar_mul_bit_x0_y0_uses(
; CHECK-NEXT: [[AND1:%.*]] = and i64 [[X:%.*]], 1
+; CHECK-NEXT: call void @use(i64 [[AND1]])
; CHECK-NEXT: [[AND2:%.*]] = and i64 [[Y:%.*]], 1
-; CHECK-NEXT: [[MUL:%.*]] = mul nuw nsw i64 [[AND1]], [[AND2]]
+; CHECK-NEXT: call void @use(i64 [[AND2]])
+; CHECK-NEXT: [[MUL:%.*]] = and i64 [[AND2]], [[X]]
; CHECK-NEXT: ret i64 [[MUL]]
;
%and1 = and i64 %x, 1
+ call void @use(i64 %and1)
%and2 = and i64 %y, 1
+ call void @use(i64 %and2)
%mul = mul i64 %and1, %and2
ret i64 %mul
}
@@ -210,9 +228,8 @@ define i64 @scalar_mul_bit_x0_yC(i64 %x, i64 %y, i64 %c) {
; Vector tests
define <2 x i64> @vector_mul_bit_x0_y0(<2 x i64> %x, <2 x i64> %y) {
; CHECK-LABEL: @vector_mul_bit_x0_y0(
-; CHECK-NEXT: [[AND1:%.*]] = and <2 x i64> [[X:%.*]], <i64 1, i64 1>
; CHECK-NEXT: [[AND2:%.*]] = and <2 x i64> [[Y:%.*]], <i64 1, i64 1>
-; CHECK-NEXT: [[MUL:%.*]] = mul nuw nsw <2 x i64> [[AND1]], [[AND2]]
+; CHECK-NEXT: [[MUL:%.*]] = and <2 x i64> [[AND2]], [[X:%.*]]
; CHECK-NEXT: ret <2 x i64> [[MUL]]
;
%and1 = and <2 x i64> %x, <i64 1, i64 1>
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