[PATCH] D126532: [SVE] Add a DAG combiner fold to visitADD for vscale with truncate

[Allen zhong via Phabricator via llvm-commits]

Allen marked 2 inline comments as done.
Allen added inline comments.


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Comment at: llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp:2634
+      (N1.getOpcode() == ISD::TRUNCATE) &&
+      (N1.getOperand(0).getOpcode() == ISD::VSCALE)) {
+    EVT VSVT = N1.getOperand(0).getValueType();
----------------
craig.topper wrote:
> Allen wrote:
> > craig.topper wrote:
> > > Do you need to check that both vscales have the same types?
> > Thanks for your attention. 
> > As only the same type node can be on the both side of ISD::ADD, so I think it can be ignored. Am I missing something?
> There's no guarantee the input types of the two truncates is the same. You could have something like  (i16 trunc (i32 vscale)) and (i16 trunc (i64 vscale)).
Thanks for detail example.  Apply your comment


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https://reviews.llvm.org/D126532