[PATCH] D126532: [SVE] Add a DAG combiner fold to visitADD for vscale with truncate
Allen zhong via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Sat May 28 15:59:23 PDT 2022
Allen marked 2 inline comments as done.
Allen added inline comments.
================
Comment at: llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp:2634
+ (N1.getOpcode() == ISD::TRUNCATE) &&
+ (N1.getOperand(0).getOpcode() == ISD::VSCALE)) {
+ EVT VSVT = N1.getOperand(0).getValueType();
----------------
craig.topper wrote:
> Do you need to check that both vscales have the same types?
Thanks for your attention.
As only the same type node can be on the both side of ISD::ADD, so I think it can be ignored. Am I missing something?
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D126532/new/
https://reviews.llvm.org/D126532
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