[PATCH] D126563: [RISCV] Allow PRE of vsetvli involving non-1 LMUL

Philip Reames via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Sat May 28 08:19:04 PDT 2022


reames added a comment.

In D126563#3543770 <https://reviews.llvm.org/D126563#3543770>, @frasercrmck wrote:

> Seems like there's no fractional LMULs tested by this patch? Does this suggest we should add some more test coverage?

Well, I would, but I could not find an example in tree of what a fractional LMUL looks like in IR.  (Probably just because I don't know what syntax looks like).  If you give me an example, I can take it from there.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D126563/new/

https://reviews.llvm.org/D126563



More information about the llvm-commits mailing list