[PATCH] D126449: [AArch64] Reuse larger DUP if available

[Sam Tebbs via Phabricator via llvm-commits]

samtebbs accepted this revision.
samtebbs added a comment.
This revision is now accepted and ready to land.

LGTM



================
Comment at: llvm/lib/Target/AArch64/AArch64ISelLowering.cpp:18155
+      return DCI.DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL, VT, SDValue(LN, 0),
+                             DCI.DAG.getConstant(0, DL, MVT::i64));
+    }
----------------
dmgreen wrote:
> samtebbs wrote:
> > In `tryExtendDUPToExtractHigh` above, the `EXTRACT_SUBVECTOR` gets `NumElems` as the constant, but this one gets 0. Why is it 0 in this case? Seems like an odd number to give `EXTRACT_SUBVECTOR`.
> It means "extract the bottom lanes". As in - we start from lane 0. All the lanes are equal in a dup, but it is the bottom ones that are free to extract from.
> 
> The NumElems in tryExtendDUPToExtractHigh is extracting the high half, because NumElems is the number of lanes in the 64bit vector. So it extracts the high 64bits from a 128bit vector and can produce a smull2 instruction as a result.
Great explanation. Thanks.


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D126449/new/

https://reviews.llvm.org/D126449