[PATCH] D125700: [AMDGPU][GFX9] Support base+soffset+offset SMEM loads.

[Ivan Kosarev via Phabricator via llvm-commits]

kosarev added inline comments.


================
Comment at: llvm/lib/Target/AMDGPU/SMInstructions.td:570
+    !if(ps.has_soffset, soffset{6-0}, ?),
+    !if(!and(ps.has_offset, ps.has_soffset), soffset{6-0}, ?));
 }
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dp wrote:
> Now that we have IsGFX9Specific, could not this expression be replaced with '?'
Nice catch. Done.


================
Comment at: llvm/lib/Target/AMDGPU/SMInstructions.td:587
+    let SOffsetEn = 1, Offset = ?, Subtarget = SIEncodingFamily.GFX9,
+        AsmVariantName = "NonParsable" in
+    def _SGPR_alt_gfx9 : SMEM_Real_Load_vi <op, ps#"_SGPR",
----------------
dp wrote:
> Ingenious!
The NonParsable bit, that's been borrowed from the Hexagon backend, so all the credit goes there!


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D125700/new/

https://reviews.llvm.org/D125700