[PATCH] D126185: [RISCV]Remove solved TODO for combining constant shifts
Ben Shi via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Wed May 25 18:55:52 PDT 2022
This revision was landed with ongoing or failed builds.
This revision was automatically updated to reflect the committed changes.
Closed by commit rG085acede578f: [RISCV][NFC] Remove solved TODO for combining constant shifts (authored by Luhaocong, committed by benshi001).
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D126185/new/
https://reviews.llvm.org/D126185
Files:
llvm/test/CodeGen/RISCV/rv64i-exhaustive-w-insts.ll
Index: llvm/test/CodeGen/RISCV/rv64i-exhaustive-w-insts.ll
===================================================================
--- llvm/test/CodeGen/RISCV/rv64i-exhaustive-w-insts.ll
+++ llvm/test/CodeGen/RISCV/rv64i-exhaustive-w-insts.ll
@@ -1763,8 +1763,6 @@
ret i32 %1
}
-; TODO: the constant shifts could be combined.
-
define zeroext i32 @zext_slliw_aext(i32 %a) nounwind {
; RV64-LABEL: zext_slliw_aext:
; RV64: # %bb.0:
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