[llvm] 085aced - [RISCV][NFC] Remove solved TODO for combining constant shifts

[Ben Shi via llvm-commits]

Author: Haocong.Lu
Date: 2022-05-26T09:55:19+08:00
New Revision: 085acede578f1151b1b73b1050b2c42e0a6ce10d

URL: https://github.com/llvm/llvm-project/commit/085acede578f1151b1b73b1050b2c42e0a6ce10d
DIFF: https://github.com/llvm/llvm-project/commit/085acede578f1151b1b73b1050b2c42e0a6ce10d.diff

LOG: [RISCV][NFC] Remove solved TODO for combining constant shifts

Reviewed By: benshi001, asb

Differential Revision: https://reviews.llvm.org/D126185

Added: 
    

Modified: 
    llvm/test/CodeGen/RISCV/rv64i-exhaustive-w-insts.ll

Removed: 
    


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diff  --git a/llvm/test/CodeGen/RISCV/rv64i-exhaustive-w-insts.ll b/llvm/test/CodeGen/RISCV/rv64i-exhaustive-w-insts.ll
index 22791dd99465e..d02ab93a5aca5 100644
--- a/llvm/test/CodeGen/RISCV/rv64i-exhaustive-w-insts.ll
+++ b/llvm/test/CodeGen/RISCV/rv64i-exhaustive-w-insts.ll
@@ -1763,8 +1763,6 @@ define signext i32 @sext_slliw_zext(i32 zeroext %a) nounwind {
   ret i32 %1
 }
 
-; TODO: the constant shifts could be combined.
-
 define zeroext i32 @zext_slliw_aext(i32 %a) nounwind {
 ; RV64-LABEL: zext_slliw_aext:
 ; RV64:       # %bb.0: