[PATCH] D125824: [AMDGPU] gfx11 export instructions

Wed May 25 05:18:36 PDT 2022

dp added inline comments.

================
Comment at: llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp:642-643
+  if (STI.getFeatureBits()[AMDGPU::FeatureGFX11]) {
+    // The MCInst still has these fields even though they are no longer encoded
+    // in the GFX11 instruction.
+    insertNamedMCOperand(MI, MCOperand::createImm(0), AMDGPU::OpName::vm);
----------------
Joe_Nash wrote:
> foad wrote:
> > arsenm wrote:
> > > Why not remove them then? I guess that would just move the handling from MI->MC from the pseudo
> > Probably just because I didn't know how to implement that. Is there a good place to do stuff like this when lowering from MI to MC?
> It seems like there are 3 options: different pseudos between subtargets, handle this in MI->MC (I don't know if there are any examples of this?), and in the asm/disasm (quite common in AMDGPU). So is there anything to do here?
This looks as a small and acceptable hack to me. Other alternatives would require more changes without significant benefits.

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D125824/new/

https://reviews.llvm.org/D125824