[PATCH] D126317: [RISCV] Add an operand kind to the instruction/imm returned from RISCVMatInt.

[Craig Topper via Phabricator via llvm-commits]

craig.topper created this revision.
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Instead of matching opcodes to know the format to emit, use an
enum value that comes along with the opcode.

Change the consumers to use fully covered switches so that we get
a compiler warning if a new kind is added. With the opcode checks
it was easier to forget to update one of the 3 consumers.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D126317

Files:
  llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
  llvm/lib/Target/RISCV/MCTargetDesc/RISCVMatInt.cpp
  llvm/lib/Target/RISCV/MCTargetDesc/RISCVMatInt.h
  llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
  llvm/lib/Target/RISCV/RISCVInstrInfo.cpp

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