[PATCH] D124869: [RISCV] Hoist VSETVLI out of idiomatic fixed length vector loops

[Philip Reames via Phabricator via llvm-commits]

reames added inline comments.


================
Comment at: llvm/lib/Target/RISCV/RISCVInsertVSETVLI.cpp:105
+
+  uint8_t getSEW() const { return SEW; }
+  RISCVII::VLMUL getVLMUL() const { return VLMul; }
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craig.topper wrote:
> Any reason to restrict this uint8_t? Looks like it's a assigned to unsigned where it's used.
uint8_t matches the actual type of the field.  I can change it if you want, but it seems cleaner to me to match the field type.  


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D124869/new/

https://reviews.llvm.org/D124869