[PATCH] D116088: [compiler-rt] Implement ARM atomic operations for architectures without SMP support

Pavel Kosov via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Tue May 24 06:02:49 PDT 2022


kpdev42 added a comment.

At the moment, in case of compiler-rt, `__sync_add_and_fetch` boils down to
`__sync_add_and_fetch_N`, where `N` is the size of data being fetched (4 for int).
The implementation of `__sync_fetch_and_add_N` does approximately the following:

1. Sets memory barrier
2. Calls atomic load from memory location
3. Modifies data
4. Calls atomic store to memory location
5. Checks that operation is consistent, if not goes to step 2.

IMO, performance-wise there is not much difference (if any) between this and
modifying data with acquiring spinlock.

No code in compiler-rt disables interrupts, so it can and will be interrupted in the middle,
by a different thread however I don't see any problem in this.

Now if we are on a platform which doesn't support SMP we can use ordinary memory operations instead
of atomic ones, can't we?


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