[PATCH] D126273: [DAGCombiner][VP] Add DAGCombine for merging VP_FADD and VP_FMUL to VP_FMA.
Liao Chunyu via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Tue May 24 05:56:50 PDT 2022
liaolucy added a comment.
In D126273#3534004 <https://reviews.llvm.org/D126273#3534004>, @fakepaper56 wrote:
> In D126273#3533580 <https://reviews.llvm.org/D126273#3533580>, @liaolucy wrote:
>
>> When I test tsvc.
>>
>> The IR is:
>>
>> @llvm.fmuladd.nxv2f32(<vscale x 2 x float>.....
>>
>> Not
>>
>> @llvm.riscv.vfmul.nxv2f32.nxv2f32(<vscale x 2 x float> ......
>> @llvm.riscv.vfadd.nxv2f32.nxv2f32(<vscale x 2 x float> ......
>>
>>
>> So I am not sure, we need merge vp.fmul and vp.fadd to vp.fma. maybe vp.fma is enough?
>
> I am not sure what is tscv. Could you tell its full name?
> But I think the case may happen when loop vectorizer generates vector prediction intrinsics.
tsvc:
https://github.com/llvm/llvm-test-suite/blob/main/MultiSource/Benchmarks/TSVC/tsc.inc
Repository:
rG LLVM Github Monorepo
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https://reviews.llvm.org/D126273/new/
https://reviews.llvm.org/D126273
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