[PATCH] D125075: [X86][AMX] Multiple configure for AMX register.

[LuoYuanke via Phabricator via llvm-commits]

LuoYuanke added inline comments.


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Comment at: llvm/lib/Target/X86/X86FastPreTileConfig.cpp:576
+    // If the src and dst of the COPY can NOT be in the same config in below
+    // case. Reload would be generated befor the copy instruction.
+    // def row0
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xiangzhangllvm wrote:
> Copy will cause the wrong action for following get shape.
> MI.getOperand(x)
Copy is filter out by isTileDef? 


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Comment at: llvm/lib/Target/X86/X86FastPreTileConfig.cpp:550
+    if (HasTileOperand(MRI, MI))
+      HasUnconfigTile = true;
+    // According to AMX ABI, all the tile registers including config register
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xiangzhangllvm wrote:
> xiangzhangllvm wrote:
> > LuoYuanke wrote:
> > > xiangzhangllvm wrote:
> > > > I am afraid , even without call, 1 ldtilecfg is not enough for 1 MBB.
> > > > For example
> > > > In 1 MBB, it contain 4 shapes, but the first 3 shape used up the "max reg num of ldtilecfg (8)" virtual tile regs in follow code. So It need another ldtilecfg.
> > > That would run out of register. Currently we have valotiled tile in "lower amx type" pass. We can improve it later and disable volatile tile in that pass.
> > If we consider greedy-->fast, we should consider this problem.
> And do we need to consider shape number > "max reg num of ldtilecfg (8)" in current stage ? It is possible in big BB.
That is not supported yet. We can improve it later.


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  https://reviews.llvm.org/D125075/new/

https://reviews.llvm.org/D125075