[PATCH] D125926: Remove duplicate fields in RAGreedy
Stella Stamenova via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Mon May 23 13:08:52 PDT 2022
This revision was automatically updated to reflect the committed changes.
Closed by commit rG12bae5f3e2d2: Remove duplicate fields in RAGreedy (authored by qunyanm, committed by stella.stamenova).
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D125926/new/
https://reviews.llvm.org/D125926
Files:
llvm/lib/CodeGen/RegAllocGreedy.cpp
llvm/lib/CodeGen/RegAllocGreedy.h
Index: llvm/lib/CodeGen/RegAllocGreedy.h
===================================================================
--- llvm/lib/CodeGen/RegAllocGreedy.h
+++ llvm/lib/CodeGen/RegAllocGreedy.h
@@ -164,8 +164,6 @@
// Shortcuts to some useful interface.
const TargetInstrInfo *TII;
- const TargetRegisterInfo *TRI;
- RegisterClassInfo RCI;
// analyses
SlotIndexes *Indexes;
Index: llvm/lib/CodeGen/RegAllocGreedy.cpp
===================================================================
--- llvm/lib/CodeGen/RegAllocGreedy.cpp
+++ llvm/lib/CodeGen/RegAllocGreedy.cpp
@@ -310,8 +310,9 @@
// prevents excessive spilling in pathological cases.
bool ReverseLocal = TRI->reverseLocalAssignment();
const TargetRegisterClass &RC = *MRI->getRegClass(Reg);
- bool ForceGlobal = !ReverseLocal &&
- (Size / SlotIndex::InstrDist) > (2 * RCI.getNumAllocatableRegs(&RC));
+ bool ForceGlobal =
+ !ReverseLocal && (Size / SlotIndex::InstrDist) >
+ (2 * RegClassInfo.getNumAllocatableRegs(&RC));
unsigned GlobalBit = 0;
if (Stage == RS_Assign && !ForceGlobal && !LI->empty() &&
@@ -1444,7 +1445,8 @@
const TargetRegisterClass *SuperRC =
TRI->getLargestLegalSuperClass(CurRC, *MF);
- unsigned SuperRCNumAllocatableRegs = RCI.getNumAllocatableRegs(SuperRC);
+ unsigned SuperRCNumAllocatableRegs =
+ RegClassInfo.getNumAllocatableRegs(SuperRC);
// Split around every non-copy instruction if this split will relax
// the constraints on the virtual register.
// Otherwise, splitting just inserts uncoalescable copies that do not help
@@ -1454,7 +1456,7 @@
if (MI->isFullCopy() ||
SuperRCNumAllocatableRegs ==
getNumAllocatableRegsForConstraints(MI, VirtReg.reg(), SuperRC,
- TII, TRI, RCI)) {
+ TII, TRI, RegClassInfo)) {
LLVM_DEBUG(dbgs() << " skip:\t" << Use << '\t' << *MI);
continue;
}
@@ -2681,9 +2683,7 @@
<< "********** Function: " << mf.getName() << '\n');
MF = &mf;
- TRI = MF->getSubtarget().getRegisterInfo();
TII = MF->getSubtarget().getInstrInfo();
- RCI.runOnMachineFunction(mf);
if (VerifyEnabled)
MF->verify(this, "Before greedy register allocator");
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