[llvm] 818cc9b - [AMDGPU][MC][GFX940] Disable v_mac_f32_dpp

Dmitry Preobrazhensky via llvm-commits llvm-commits at lists.llvm.org
Mon May 23 05:51:00 PDT 2022


Author: Dmitry Preobrazhensky
Date: 2022-05-23T15:49:44+03:00
New Revision: 818cc9b285e8577d1255f8b046f87fc487fd3bd0

URL: https://github.com/llvm/llvm-project/commit/818cc9b285e8577d1255f8b046f87fc487fd3bd0
DIFF: https://github.com/llvm/llvm-project/commit/818cc9b285e8577d1255f8b046f87fc487fd3bd0.diff

LOG: [AMDGPU][MC][GFX940] Disable v_mac_f32_dpp

Differential Revision: https://reviews.llvm.org/D126070

Added: 
    

Modified: 
    llvm/lib/Target/AMDGPU/VOPInstructions.td
    llvm/test/MC/AMDGPU/gfx940_err.s

Removed: 
    


################################################################################
diff  --git a/llvm/lib/Target/AMDGPU/VOPInstructions.td b/llvm/lib/Target/AMDGPU/VOPInstructions.td
index bb92333304c23..78f9beae49f97 100644
--- a/llvm/lib/Target/AMDGPU/VOPInstructions.td
+++ b/llvm/lib/Target/AMDGPU/VOPInstructions.td
@@ -708,6 +708,7 @@ class VOP_DPP_Real <VOP_DPP_Pseudo ps, int EncodingFamily> :
   let isConvergent         = ps.isConvergent;
   let SubtargetPredicate   = ps.SubtargetPredicate;
   let AssemblerPredicate   = ps.AssemblerPredicate;
+  let OtherPredicates      = ps.OtherPredicates;
   let AsmMatchConverter    = ps.AsmMatchConverter;
   let AsmVariantName       = ps.AsmVariantName;
   let UseNamedOperandTable = ps.UseNamedOperandTable;

diff  --git a/llvm/test/MC/AMDGPU/gfx940_err.s b/llvm/test/MC/AMDGPU/gfx940_err.s
index e425f23e83f8f..da38629c5afc2 100644
--- a/llvm/test/MC/AMDGPU/gfx940_err.s
+++ b/llvm/test/MC/AMDGPU/gfx940_err.s
@@ -1,8 +1,19 @@
 // RUN: not llvm-mc -arch=amdgcn -mcpu=gfx940 %s 2>&1 | FileCheck --check-prefix=GFX940 --implicit-check-not=error: %s
 
 v_mac_f32 v0, v1, v2
-// FIXME: error message is incorrect
-// GFX940: error: operands are not valid for this GPU or mode
+// GFX940: error: instruction not supported on this GPU
+
+v_mac_f32_e64 v5, v1, v2
+// GFX940: error: instruction not supported on this GPU
+
+v_mac_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf
+// GFX940: error: instruction not supported on this GPU
+
+v_mac_f32_dpp v5, v1, v2 dpp8:[7,6,5,4,3,2,1,0]
+// GFX940: error: instruction not supported on this GPU
+
+v_mac_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD
+// GFX940: error: instruction not supported on this GPU
 
 v_mad_f32 v0, v1, v2, v3
 // GFX940: error: instruction not supported on this GPU


        


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